[3a5fec8] | 1 | /* |
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| 2 | * Termios console serial driver. |
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| 3 | * |
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| 4 | * Based on SCI driver by Ralf Corsepius and John M. Mills |
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| 5 | * |
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| 6 | * Author: Radzislaw Galler <rgaller@et.put.poznan.pl> |
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| 7 | * |
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| 8 | * COPYRIGHT (c) 1989-2001. |
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| 9 | * On-Line Applications Research Corporation (OAR). |
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| 10 | * |
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| 11 | * The license and distribution terms for this file may be |
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| 12 | * found in the file LICENSE in this distribution or at |
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| 13 | * http://www.OARcorp.com/rtems/license.html. |
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| 14 | * |
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| 15 | * $Id$ |
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| 16 | * |
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| 17 | */ |
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| 18 | |
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| 19 | #include <bsp.h> |
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| 20 | #include <stdlib.h> |
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| 21 | |
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| 22 | #include <libchip/serial.h> |
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| 23 | #include <libchip/sersupp.h> |
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| 24 | |
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| 25 | #include <rtems/libio.h> |
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| 26 | #include <iosupp.h> |
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| 27 | |
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| 28 | #include <rtems/score/sh_io.h> |
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| 29 | #include <rtems/score/ispsh7045.h> |
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| 30 | #include <rtems/score/iosh7045.h> |
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| 31 | |
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| 32 | #include <sh/sh7_sci.h> |
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| 33 | #include <sh/sh7_pfc.h> |
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| 34 | #include <sh/sci_termios.h> |
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| 35 | |
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| 36 | |
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| 37 | /* |
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| 38 | * Some handy macros |
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| 39 | */ |
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| 40 | #define SH_SCI_REG_DATA(_data, _minor, _register) \ |
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| 41 | (write8(_data, Console_Port_Tbl[_minor].ulCtrlPort1 + (_register))) |
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| 42 | |
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| 43 | #define SH_SCI_REG_FLAG(_flag, _minor, _register) \ |
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| 44 | (write8(read8(Console_Port_Tbl[_minor].ulCtrlPort1 + (_register)) | (_flag), \ |
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| 45 | Console_Port_Tbl[_minor].ulCtrlPort1 + (_register))) |
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| 46 | |
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| 47 | #define SH_SCI_REG_MASK(_flag, _minor, _register) \ |
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| 48 | (write8(read8(Console_Port_Tbl[_minor].ulCtrlPort1 + (_register)) & ~(_flag), \ |
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| 49 | Console_Port_Tbl[_minor].ulCtrlPort1 + (_register))) |
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| 50 | |
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| 51 | /* |
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| 52 | * NOTE: Some SH variants have 3 sci devices |
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| 53 | */ |
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| 54 | |
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| 55 | #define SCI_MINOR_DEVICES 2 |
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| 56 | |
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| 57 | |
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| 58 | /* |
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| 59 | * Automatically generated function imported from scitab.rel |
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| 60 | */ |
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| 61 | extern int _sci_get_brparms( |
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| 62 | tcflag_t cflag, |
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| 63 | unsigned char *smr, |
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| 64 | unsigned char *brr ); |
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| 65 | |
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| 66 | /* |
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| 67 | * Translate termios flags into SCI settings |
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| 68 | */ |
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| 69 | int sh_sci_set_attributes( |
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| 70 | int minor, |
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| 71 | const struct termios *t |
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| 72 | ) |
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| 73 | { |
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| 74 | unsigned8 smr ; |
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| 75 | unsigned8 brr ; |
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| 76 | int a; |
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| 77 | |
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| 78 | tcflag_t c_cflag = t->c_cflag; |
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| 79 | |
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| 80 | if ( c_cflag & CBAUD ) |
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| 81 | { |
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| 82 | if ( _sci_get_brparms( c_cflag, &smr, &brr ) != 0 ) |
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| 83 | return -1 ; |
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| 84 | } |
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| 85 | |
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| 86 | if ( c_cflag & CSIZE ) |
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| 87 | { |
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| 88 | if ( c_cflag & CS8 ) |
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| 89 | smr &= ~SCI_SEVEN_BIT_DATA; |
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| 90 | else if ( c_cflag & CS7 ) |
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| 91 | smr |= SCI_SEVEN_BIT_DATA; |
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| 92 | else |
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| 93 | return -1 ; |
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| 94 | } |
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| 95 | |
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| 96 | if ( c_cflag & CSTOPB ) |
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| 97 | smr |= SCI_STOP_BITS_2; |
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| 98 | else |
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| 99 | smr &= ~SCI_STOP_BITS_2; |
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| 100 | |
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| 101 | if ( c_cflag & PARENB ) |
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| 102 | smr |= SCI_PARITY_ON ; |
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| 103 | else |
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| 104 | smr &= ~SCI_PARITY_ON ; |
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| 105 | |
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| 106 | if ( c_cflag & PARODD ) |
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| 107 | smr |= SCI_ODD_PARITY ; |
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| 108 | else |
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| 109 | smr &= ~SCI_ODD_PARITY; |
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| 110 | |
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| 111 | SH_SCI_REG_MASK((SCI_RE | SCI_TE), minor, SCI_SCR); |
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| 112 | |
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| 113 | SH_SCI_REG_DATA(smr, minor, SCI_SMR); |
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| 114 | SH_SCI_REG_DATA(brr, minor, SCI_BRR); |
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| 115 | |
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| 116 | for(a=0; a < 10000L; a++) { /* Delay one bit */ |
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| 117 | asm volatile ("nop"); |
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| 118 | } |
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| 119 | |
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| 120 | SH_SCI_REG_FLAG((SCI_RE | SCI_TE), minor, SCI_SCR); |
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| 121 | |
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| 122 | return 0; |
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| 123 | } |
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| 124 | |
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| 125 | /* |
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| 126 | * Receive-data-full ISR |
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| 127 | * |
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| 128 | * The same routine for all interrupt sources of the same type. |
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| 129 | */ |
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| 130 | rtems_isr sh_sci_rx_isr(rtems_vector_number vector) |
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| 131 | { |
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| 132 | int minor; |
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| 133 | |
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| 134 | for(minor = 0; minor < Console_Port_Count; minor++) |
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| 135 | { |
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| 136 | if(Console_Port_Tbl[minor].ulIntVector == vector) |
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| 137 | { |
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| 138 | unsigned8 temp8; |
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| 139 | |
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| 140 | /* |
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| 141 | * FIXME: error handling should be added |
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| 142 | */ |
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| 143 | temp8 = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_RDR); |
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| 144 | |
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| 145 | rtems_termios_enqueue_raw_characters( |
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| 146 | Console_Port_Data[minor].termios_data, |
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| 147 | (char*)&temp8, 1); |
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| 148 | |
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| 149 | SH_SCI_REG_MASK(SCI_RDRF, minor, SCI_SSR); |
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| 150 | break; |
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| 151 | } |
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| 152 | } |
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| 153 | } |
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| 154 | |
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| 155 | /* |
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| 156 | * Transmit-data-empty ISR |
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| 157 | * |
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| 158 | * The same routine for all interrupt sources of the same type. |
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| 159 | */ |
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| 160 | rtems_isr sh_sci_tx_isr(rtems_vector_number vector) |
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| 161 | { |
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| 162 | int minor; |
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| 163 | |
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| 164 | for(minor = 0; minor < Console_Port_Count; minor++) |
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| 165 | { |
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| 166 | if(Console_Port_Tbl[minor].ulDataPort == vector) |
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| 167 | { |
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| 168 | /* |
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| 169 | * FIXME: Error handling should be added |
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| 170 | */ |
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| 171 | |
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| 172 | /* |
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| 173 | * Mask end-of-transmission interrupt |
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| 174 | */ |
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| 175 | SH_SCI_REG_MASK(SCI_TIE, minor, SCI_SCR); |
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| 176 | |
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| 177 | if(rtems_termios_dequeue_characters( |
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| 178 | Console_Port_Data[minor].termios_data, 1)) |
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| 179 | { |
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| 180 | /* |
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| 181 | * More characters to be received - interrupt must be enabled |
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| 182 | */ |
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| 183 | SH_SCI_REG_FLAG(SCI_TIE, minor, SCI_SCR); |
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| 184 | } |
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| 185 | break; |
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| 186 | } |
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| 187 | } |
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| 188 | } |
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| 189 | |
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| 190 | |
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| 191 | /* |
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| 192 | * Initialization of serial port |
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| 193 | */ |
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| 194 | void sh_sci_init(int minor) |
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| 195 | { |
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| 196 | unsigned16 temp16; |
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| 197 | |
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| 198 | /* |
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| 199 | * set PFC registers to enable I/O pins |
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| 200 | */ |
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| 201 | if ((minor == 0)) |
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| 202 | { |
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| 203 | temp16 = read16(PFC_PACRL2); /* disable SCK0, DMA, IRQ */ |
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| 204 | temp16 &= ~(PA2MD1 | PA2MD0); |
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| 205 | temp16 |= (PA_TXD0 | PA_RXD0); /* enable pins for Tx0, Rx0 */ |
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| 206 | write16(temp16, PFC_PACRL2); |
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| 207 | |
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| 208 | } |
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| 209 | else if (minor == 1) |
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| 210 | { |
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| 211 | temp16 = read16(PFC_PACRL2); /* disable SCK1, DMA, IRQ */ |
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| 212 | temp16 &= ~(PA5MD1 | PA5MD0); |
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| 213 | temp16 |= (PA_TXD1 | PA_RXD1); /* enable pins for Tx1, Rx1 */ |
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| 214 | write16(temp16, PFC_PACRL2); |
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| 215 | } |
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| 216 | |
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| 217 | /* |
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| 218 | * Non-default hardware setup occurs in sh_sci_first_open |
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| 219 | */ |
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| 220 | } |
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| 221 | |
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| 222 | /* |
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| 223 | * Initialization of interrupts |
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| 224 | * |
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| 225 | * Interrupts can be started only after opening a device, so interrupt |
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| 226 | * flags are set up in sh_sci_first_open function |
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| 227 | */ |
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| 228 | void sh_sci_initialize_interrupts(int minor) |
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| 229 | { |
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| 230 | rtems_isr_entry old_isr; |
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| 231 | rtems_status_code status; |
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| 232 | |
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| 233 | sh_sci_init(minor); |
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| 234 | /* |
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| 235 | * Disable IRQ of SCIx |
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| 236 | */ |
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| 237 | status = sh_set_irq_priority( |
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| 238 | Console_Port_Tbl[minor].ulIntVector, 0); |
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| 239 | |
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| 240 | if(status != RTEMS_SUCCESSFUL) |
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| 241 | rtems_fatal_error_occurred(status); |
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| 242 | |
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| 243 | SH_SCI_REG_MASK(SCI_RIE, minor, SCI_SCR); |
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| 244 | |
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| 245 | /* |
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| 246 | * Catch apropriate vectors |
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| 247 | */ |
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| 248 | status = rtems_interrupt_catch( |
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| 249 | sh_sci_rx_isr, |
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| 250 | Console_Port_Tbl[minor].ulIntVector, |
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| 251 | &old_isr); |
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| 252 | |
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| 253 | if(status != RTEMS_SUCCESSFUL) |
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| 254 | rtems_fatal_error_occurred(status); |
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| 255 | |
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| 256 | status = rtems_interrupt_catch( |
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| 257 | sh_sci_tx_isr, |
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| 258 | Console_Port_Tbl[minor].ulDataPort, |
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| 259 | &old_isr); |
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| 260 | |
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| 261 | if(status != RTEMS_SUCCESSFUL) |
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| 262 | rtems_fatal_error_occurred(status); |
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| 263 | |
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| 264 | /* |
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| 265 | * Enable IRQ of SCIx |
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| 266 | */ |
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| 267 | SH_SCI_REG_FLAG(SCI_RIE, minor, SCI_SCR); |
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| 268 | |
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| 269 | status = sh_set_irq_priority( |
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| 270 | Console_Port_Tbl[minor].ulIntVector, |
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| 271 | Console_Port_Tbl[minor].ulCtrlPort2); |
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| 272 | |
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| 273 | if(status != RTEMS_SUCCESSFUL) |
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| 274 | rtems_fatal_error_occurred(status); |
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| 275 | } |
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| 276 | |
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| 277 | |
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| 278 | /* |
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| 279 | * Open entry point |
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| 280 | * Sets up port and pins for selected sci. |
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| 281 | */ |
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| 282 | |
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| 283 | int sh_sci_first_open( |
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| 284 | int major, |
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| 285 | int minor, |
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| 286 | void *arg ) |
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| 287 | { |
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| 288 | unsigned8 temp8; |
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| 289 | unsigned int a ; |
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| 290 | |
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| 291 | /* |
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| 292 | * check for valid minor number |
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| 293 | */ |
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| 294 | if(( minor > ( SCI_MINOR_DEVICES -1 )) || ( minor < 0 )) |
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| 295 | { |
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| 296 | return RTEMS_INVALID_NUMBER; |
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| 297 | } |
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| 298 | |
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| 299 | /* |
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| 300 | * set up SCI registers |
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| 301 | */ |
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| 302 | /* Clear SCR - disable Tx and Rx */ |
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| 303 | SH_SCI_REG_DATA(0x00, minor, SCI_SCR); |
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| 304 | |
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| 305 | /* set SMR and BRR - baudrate and format */ |
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| 306 | sh_sci_set_attributes(minor, Console_Port_Tbl[minor].pDeviceParams); |
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| 307 | |
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| 308 | for(a=0; a < 10000L; a++) { /* Delay */ |
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| 309 | asm volatile ("nop"); |
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| 310 | } |
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| 311 | |
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| 312 | write8((SCI_RE | SCI_TE), /* enable async. Tx and Rx */ |
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| 313 | Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SCR); |
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| 314 | |
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| 315 | /* |
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| 316 | * clear error flags |
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| 317 | */ |
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| 318 | temp8 = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR); |
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| 319 | while(temp8 & (SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER)) |
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| 320 | { |
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| 321 | /* flush input */ |
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| 322 | temp8 = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_RDR); |
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| 323 | |
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| 324 | /* clear some flags */ |
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| 325 | SH_SCI_REG_FLAG((SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER), minor, SCI_SSR); |
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| 326 | |
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| 327 | /* check if everything is OK */ |
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| 328 | temp8 = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR); |
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| 329 | } |
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| 330 | |
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| 331 | /* Clear RDRF flag */ |
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| 332 | SH_SCI_REG_DATA(0x00, minor, SCI_TDR); /* force output */ |
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| 333 | |
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| 334 | /* Clear the TDRE bit */ |
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| 335 | SH_SCI_REG_FLAG(SCI_TDRE, minor, SCI_SSR); |
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| 336 | |
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| 337 | /* |
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| 338 | * Interrupt setup |
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| 339 | */ |
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| 340 | if(Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts) |
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| 341 | { |
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| 342 | SH_SCI_REG_FLAG(SCI_RIE, minor, SCI_SCR); |
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| 343 | } |
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| 344 | |
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| 345 | return RTEMS_SUCCESSFUL ; |
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| 346 | } |
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| 347 | |
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| 348 | /* |
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| 349 | * Close entry point |
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| 350 | */ |
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| 351 | |
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| 352 | int sh_sci_last_close( |
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| 353 | int major, |
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| 354 | int minor, |
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| 355 | void *arg |
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| 356 | ) |
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| 357 | { |
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| 358 | /* FIXME: Incomplete */ |
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| 359 | |
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| 360 | /* Shutdown interrupts if necessary */ |
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| 361 | if(Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts) |
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| 362 | { |
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| 363 | SH_SCI_REG_MASK((SCI_TIE | SCI_RIE), minor, SCI_SCR); |
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| 364 | } |
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| 365 | return RTEMS_SUCCESSFUL ; |
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| 366 | } |
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| 367 | |
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| 368 | /* |
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| 369 | * Interrupt aware write routine |
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| 370 | */ |
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| 371 | int sh_sci_write_support_int( |
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| 372 | int minor, |
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| 373 | const char *buf, |
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| 374 | int len |
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| 375 | ) |
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| 376 | { |
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| 377 | if(!len) |
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| 378 | return 0; |
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| 379 | /* |
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| 380 | * Put data into TDR and clear transmission-end-flag |
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| 381 | */ |
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| 382 | SH_SCI_REG_DATA(*buf, minor, SCI_TDR); |
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| 383 | SH_SCI_REG_MASK(SCI_TDRE, minor, SCI_SSR); |
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| 384 | /* |
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| 385 | * Enable interrupt |
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| 386 | */ |
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| 387 | SH_SCI_REG_FLAG(SCI_TIE, minor, SCI_SCR); |
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| 388 | |
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| 389 | return 1; |
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| 390 | } |
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| 391 | |
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| 392 | /* |
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| 393 | * Polled write method |
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| 394 | */ |
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| 395 | int sh_sci_write_support_polled( |
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| 396 | int minor, |
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| 397 | const char *buf, |
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| 398 | int len |
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| 399 | ) |
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| 400 | { |
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| 401 | int count = 0; |
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| 402 | |
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| 403 | while(count < len) |
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| 404 | { |
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| 405 | sh_sci_write_polled(minor, buf[count]); |
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| 406 | count++; |
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| 407 | } |
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| 408 | /* |
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| 409 | * Return number of bytes written |
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| 410 | */ |
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| 411 | return count; |
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| 412 | } |
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| 413 | |
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| 414 | /* |
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| 415 | * Polled write of one character at a time |
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| 416 | */ |
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| 417 | void sh_sci_write_polled( |
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| 418 | int minor, |
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| 419 | char c |
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| 420 | ) |
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| 421 | { |
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| 422 | /* |
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| 423 | * Wait for end of previous character |
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| 424 | */ |
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| 425 | while(!(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & SCI_TDRE)); |
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| 426 | /* |
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| 427 | * Send the character |
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| 428 | */ |
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| 429 | SH_SCI_REG_DATA(c, minor, SCI_TDR); |
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| 430 | |
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| 431 | /* |
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| 432 | * Clear TDRE flag |
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| 433 | */ |
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| 434 | SH_SCI_REG_MASK(SCI_TDRE, minor, SCI_SSR); |
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| 435 | } |
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| 436 | |
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| 437 | /* |
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| 438 | * Non-blocking read |
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| 439 | */ |
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| 440 | int sh_sci_inbyte_nonblocking_polled(int minor) |
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| 441 | { |
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| 442 | unsigned8 inbyte; |
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| 443 | |
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| 444 | /* |
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| 445 | * Check if input buffer is full |
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| 446 | */ |
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| 447 | if(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & SCI_RDRF) |
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| 448 | { |
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| 449 | inbyte = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_RDR); |
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| 450 | SH_SCI_REG_MASK(SCI_RDRF, minor, SCI_SSR); |
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| 451 | |
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| 452 | /* |
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| 453 | * Check for errors |
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| 454 | */ |
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| 455 | if(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & |
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| 456 | (SCI_ORER | SCI_FER | SCI_PER)) |
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| 457 | { |
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| 458 | SH_SCI_REG_MASK((SCI_ORER | SCI_FER | SCI_PER), minor, SCI_SSR); |
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| 459 | return -1; |
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| 460 | } |
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| 461 | return (int)inbyte; |
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| 462 | } |
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| 463 | return -1; |
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| 464 | } |
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