source: rtems/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c @ c8f3e82

Last change on this file since c8f3e82 was fc0ac39c, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 12, 2001 at 9:00:52 PM

2001-10-12 Joel Sherrill <joel@…>

  • clock/ckinit.c, include/iosh7045.h, include/ispsh7045.h, include/sci.h, include/sh7_pfc.h, include/sh7_sci.h, sci/sci.c, score/cpu_asm.c, score/ispsh7045.c, timer/timer.c: Fixed typo.
  • Property mode set to 100644
File size: 7.0 KB
Line 
1/*
2 *  This file contains the clock driver the Hitachi SH 704X
3 *
4 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
5 *           Bernd Becker (becker@faw.uni-ulm.de)
6 *
7 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
8 *
9 *  This program is distributed in the hope that it will be useful,
10 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
11 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12 *
13 *
14 *  COPYRIGHT (c) 1998.
15 *  On-Line Applications Research Corporation (OAR).
16 *
17 *      Modified to reflect registers of sh7045 processor:
18 *      John M. Mills (jmills@tga.com)
19 *      TGA Technologies, Inc.
20 *      100 Pinnacle Way, Suite 140
21 *      Norcross, GA 30071 U.S.A.
22 *      August, 1999
23 *
24 *      This modified file may be copied and distributed in accordance
25 *      the above-referenced license. It is provided for critique and
26 *      developmental purposes without any warranty nor representation
27 *      by the authors or by TGA Technologies.
28 *
29 *  The license and distribution terms for this file may be
30 *  found in the file LICENSE in this distribution or at
31 *  http://www.OARcorp.com/rtems/license.html.
32 *
33 *  $Id$
34 */
35
36#include <rtems.h>
37
38#include <stdlib.h>
39
40#include <rtems/libio.h>
41#include <rtems/score/sh_io.h>
42#include <rtems/score/sh.h>
43#include <rtems/score/ispsh7045.h>
44#include <rtems/score/iosh7045.h>
45
46#define _MTU_COUNTER0_MICROSECOND (Clock_MHZ/16)
47
48#ifndef CLOCKPRIO
49#define CLOCKPRIO 10
50#endif
51
52#define MTU0_STARTMASK  0xfe
53#define MTU0_SYNCMASK   0xfe
54#define MTU0_MODEMASK   0xc0
55#define MTU0_TCRMASK    0x22 /* bit 7 also used, vs 703x */
56#define MTU0_STAT_MASK  0xc0
57#define MTU0_IRQMASK    0xfe
58#define MTU0_TIERMASK   0x01
59#define IPRC_MTU0_MASK  0xff0f
60#define MTU0_TIORVAL    0x08
61
62/*
63 *  The interrupt vector number associated with the clock tick device
64 *  driver.
65 */
66
67#define CLOCK_VECTOR MTUA0_ISP_V
68
69/*
70 *  Clock_driver_ticks is a monotonically increasing counter of the
71 *  number of clock ticks since the driver was initialized.
72 */
73
74volatile rtems_unsigned32 Clock_driver_ticks;
75
76static void Clock_exit( void );
77static rtems_isr Clock_isr( rtems_vector_number vector );
78static rtems_unsigned32 Clock_MHZ ;
79
80/*
81 *  Clock_isrs is the number of clock ISRs until the next invocation of
82 *  the RTEMS clock tick routine.  The clock tick device driver
83 *  gets an interrupt once a millisecond and counts down until the
84 *  length of time between the user configured microseconds per tick
85 *  has passed.
86 */
87
88rtems_unsigned32 Clock_isrs;              /* ISRs until next tick */
89static rtems_unsigned32 Clock_isrs_const;        /* only calculated once */
90
91/*
92 * These are set by clock driver during its init
93 */
94 
95rtems_device_major_number rtems_clock_major = ~0;
96rtems_device_minor_number rtems_clock_minor;
97
98/*
99 *  The previous ISR on this clock tick interrupt vector.
100 */
101
102rtems_isr_entry  Old_ticker;
103
104/*
105 *  Isr Handler
106 */
107
108rtems_isr Clock_isr(
109  rtems_vector_number vector
110)
111{
112  /*
113   * bump the number of clock driver ticks since initialization
114   *
115
116   * determine if it is time to announce the passing of tick as configured
117   * to RTEMS through the rtems_clock_tick directive
118   *
119   * perform any timer dependent tasks
120   */
121  unsigned8 temp;
122
123  /* reset the flags of the status register */
124  temp = read8( MTU_TSR0) & MTU0_STAT_MASK;
125  write8( temp, MTU_TSR0);
126
127  Clock_driver_ticks++ ;
128
129  if( Clock_isrs == 1)
130    {
131      rtems_clock_tick();
132      Clock_isrs = Clock_isrs_const;
133    }
134  else
135    {
136      Clock_isrs-- ;
137    }
138}
139
140/*
141 *  Install_clock
142 *
143 *  Install a clock tick handler and reprograms the chip.  This
144 *  is used to initially establish the clock tick.
145 */
146
147void Install_clock(
148  rtems_isr_entry clock_isr
149)
150{
151  unsigned8 temp8 = 0;
152  unsigned32 factor = 1000000;
153 
154 
155  /*
156   *  Initialize the clock tick device driver variables
157   */
158
159  Clock_driver_ticks = 0;
160  Clock_isrs_const = rtems_configuration_get_microseconds_per_tick() / 10000;
161  Clock_isrs = Clock_isrs_const;
162 
163  factor /= rtems_configuration_get_microseconds_per_tick(); /* minimalization of integer division error */
164  Clock_MHZ = rtems_cpu_configuration_get_clicks_per_second() / factor ;
165
166  rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
167
168  /*
169   *  Hardware specific initialize goes here
170   */
171   
172  /* stop Timer 0 */
173  temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
174  write8( temp8, MTU_TSTR);
175
176  /* set initial counter value to 0 */
177  write16( 0, MTU_TCNT0);
178
179  /* Timer 0 runs independent */
180  temp8 = read8( MTU_TSYR) & MTU0_SYNCMASK;
181  write8( temp8, MTU_TSYR);
182
183  /* Timer 0 normal mode */
184  temp8 = read8( MTU_TMDR0) & MTU0_MODEMASK;
185  write8( temp8, MTU_TMDR0);
186
187  /* TCNT is cleared by GRA ; internal clock /16 */
188  write8( MTU0_TCRMASK , MTU_TCR0);
189
190  /* use GRA without I/O - pins  */
191  write8( MTU0_TIORVAL, MTU_TIORL0); 
192   
193  /* reset flags of the status register */
194  temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK;
195  write8( temp8, MTU_TSR0);
196
197  /* Irq if is equal GRA */
198  temp8 = read8( MTU_TIER0) | MTU0_TIERMASK;
199  write8( temp8, MTU_TIER0);
200
201  /* set interrupt priority */
202  if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
203    rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
204
205  /* set counter limits */
206  write16( _MTU_COUNTER0_MICROSECOND, MTU_GR0A);
207   
208  /* start counter */
209  temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK;
210  write8( temp8, MTU_TSTR);
211
212  /*
213   *  Schedule the clock cleanup routine to execute if the application exits.
214   */
215
216  atexit( Clock_exit );
217}
218
219/*
220 *  Clean up before the application exits
221 */
222
223void Clock_exit( void )
224{
225  unsigned8 temp8 = 0;
226
227  /* turn off the timer interrupts */
228  /* set interrupt priority to 0 */
229  if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
230    rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
231
232/*
233 *   temp16 = read16( MTU_TIER0) & IPRC_MTU0_IRQMASK;
234 *   write16( temp16, MTU_TIER0);
235 */
236
237  /* stop counter */
238  temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
239  write8( temp8, MTU_TSTR);
240
241  /* old vector shall not be installed */
242}
243
244/*
245 *  Clock_initialize
246 *
247 *  Device driver entry point for clock tick driver initialization.
248 */
249
250rtems_device_driver Clock_initialize(
251  rtems_device_major_number major,
252  rtems_device_minor_number minor,
253  void *pargp
254)
255{
256  Install_clock( Clock_isr );
257 
258  /*
259   * make major/minor avail to others such as shared memory driver
260   */
261 
262  rtems_clock_major = major;
263  rtems_clock_minor = minor;
264 
265  return RTEMS_SUCCESSFUL;
266}
267
268rtems_device_driver Clock_control(
269  rtems_device_major_number major,
270  rtems_device_minor_number minor,
271  void *pargp
272)
273{
274  rtems_unsigned32 isrlevel;
275  rtems_libio_ioctl_args_t *args = pargp;
276 
277  if (args != 0)
278    {
279      /*
280       * This is hokey, but until we get a defined interface
281       * to do this, it will just be this simple...
282       */
283     
284      if (args->command == rtems_build_name('I', 'S', 'R', ' '))
285        {
286          Clock_isr(CLOCK_VECTOR);
287        }
288      else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
289        {
290          rtems_isr_entry       ignored ;
291          rtems_interrupt_disable( isrlevel );
292          rtems_interrupt_catch( args->buffer, CLOCK_VECTOR, &ignored );
293         
294          rtems_interrupt_enable( isrlevel );
295        }
296    }
297  return RTEMS_SUCCESSFUL;
298}
Note: See TracBrowser for help on using the repository browser.