source: rtems/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c @ 50cf94d

4.104.114.84.95
Last change on this file since 50cf94d was 50cf94d, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 20, 1998 at 5:16:31 PM

SH port submitted from Ralf Corsepius <corsepiu@…>.

  • Property mode set to 100644
File size: 7.8 KB
Line 
1/*
2 * This file contains the isp frames for the user interrupts.
3 * From these procedures __ISR_Handler is called with the vector number
4 * as argument.
5 *
6 * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in
7 * some releases of gcc doesn't properly handle #pragma interrupt, if a
8 * file contains both isrs and normal functions.
9 *
10 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
11 *           Bernd Becker (becker@faw.uni-ulm.de)
12 *
13 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
14 *
15 *  This program is distributed in the hope that it will be useful,
16 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
17 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
18 *
19 *
20 *  COPYRIGHT (c) 1998.
21 *  On-Line Applications Research Corporation (OAR).
22 *  Copyright assigned to U.S. Government, 1994.
23 *
24 *  The license and distribution terms for this file may be
25 *  found in the file LICENSE in this distribution or at
26 *  http://www.OARcorp.com/rtems/license.html.
27 *
28 *  $Id$
29 */
30
31#include <rtems/system.h>
32#include <rtems/score/shtypes.h>
33#include <rtems/score/cpu_isps.h>
34
35/*
36 * This is a exception vector table
37 *
38 * It has the same structure like the actual vector table (vectab)
39 */
40proc_ptr _Hardware_isr_Table[256]={
41_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
42_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
43_dummy_isp, _dummy_isp, _dummy_isp,
44_nmi_isp, _usb_isp, 
45_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
46_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
47_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
48_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
49_dummy_isp, _dummy_isp, _dummy_isp, 
50/* trapa 0 -31 */
51_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
52_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
53_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
54_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
55_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
56_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
57_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
58_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
59/* irq 64 ... */
60_irq0_isp, _irq1_isp, _irq2_isp, _irq3_isp, 
61_irq4_isp, _irq5_isp, _irq6_isp, _irq7_isp,
62_dma0_isp, _dummy_isp, _dma1_isp, _dummy_isp, 
63_dma2_isp, _dummy_isp, _dma3_isp, _dummy_isp, 
64_imia0_isp, _imib0_isp, _ovi0_isp, _dummy_isp, 
65_imia1_isp, _imib1_isp, _ovi1_isp, _dummy_isp, 
66_imia2_isp, _imib2_isp, _ovi2_isp, _dummy_isp, 
67_imia3_isp, _imib3_isp, _ovi3_isp, _dummy_isp, 
68_imia4_isp, _imib4_isp, _ovi4_isp, _dummy_isp, 
69_eri0_isp, _rxi0_isp, _txi0_isp, _tei0_isp,
70_eri1_isp, _rxi1_isp, _txi1_isp, _tei1_isp,
71_prt_isp, _adu_isp, _dummy_isp, _dummy_isp, 
72_wdt_isp, 
73/* 113 */ _dref_isp
74};
75
76#define Str(a)#a
77
78/*
79 * Some versions of gcc and all version of egcs at least until egcs-1.0.2
80 * are not able to handle #praga interrupt correctly if more than 1 isr is
81 * contained in a file and when optimizing.
82 * We try to work around this problem by using the macro below.
83 */
84#define isp( name, number, func)\
85asm (".global _"Str(name)"\n\t" \
86     "_"Str(name)":       \n\t" \
87     "    mov.l r0,@-r15   \n\t" \
88     "    mov.l r1,@-r15   \n\t" \
89     "    mov.l r2,@-r15   \n\t" \
90     "    mov.l r3,@-r15   \n\t" \
91     "    mov.l r4,@-r15   \n\t" \
92     "    mov.l r5,@-r15   \n\t" \
93     "    mov.l r6,@-r15   \n\t" \
94     "    mov.l r7,@-r15   \n\t" \
95     "    mov.l r14,@-r15  \n\t" \
96     "    sts.l pr,@-r15   \n\t" \
97     "    sts.l mach,@-r15 \n\t" \
98     "    sts.l macl,@-r15 \n\t" \
99     "    mov r15,r14      \n\t" \
100     "    mov.l "Str(name)"_k, r1\n\t" \
101     "    jsr @r1           \n\t" \
102     "    mov #"Str(number)", r4\n\t" \
103     "    mov   r14,r15    \n\t" \
104     "    lds.l @r15+,macl \n\t" \
105     "    lds.l @r15+,mach \n\t" \
106     "    lds.l @r15+,pr   \n\t" \
107     "    mov.l @r15+,r14  \n\t" \
108     "    mov.l @r15+,r7   \n\t" \
109     "    mov.l @r15+,r6   \n\t" \
110     "    mov.l @r15+,r5   \n\t" \
111     "    mov.l @r15+,r4   \n\t" \
112     "    mov.l @r15+,r3   \n\t" \
113     "    mov.l @r15+,r2   \n\t" \
114     "    mov.l @r15+,r1   \n\t" \
115     "    mov.l @r15+,r0   \n\t" \
116     "    rte              \n\t" \
117     "    nop              \n\t" \
118     "    .align 2         \n\t" \
119     #name"_k: \n\t" \
120     ".long "Str(func));
121
122/************************************************
123 * Dummy interrupt service procedure for
124 * interrupts being not allowed --> Trap 34
125 ************************************************/
126asm(" .section .text
127.global __dummy_isp
128__dummy_isp:
129      mov.l r14,@-r15
130      mov   r15, r14
131      trapa #34
132      mov.l @r15+,r14
133      rte
134      nop");
135
136/*****************************
137 * Non maskable interrupt
138 *****************************/
139isp( _nmi_isp, NMI_ISP_V, ___ISR_Handler);
140
141/*****************************
142 * User break controller
143 *****************************/
144isp( _usb_isp, USB_ISP_V, ___ISR_Handler);
145
146/*****************************
147 *  External interrupts 0-7
148 *****************************/
149isp( _irq0_isp, IRQ0_ISP_V, ___ISR_Handler);
150isp( _irq1_isp, IRQ1_ISP_V, ___ISR_Handler);
151isp( _irq2_isp, IRQ2_ISP_V, ___ISR_Handler);
152isp( _irq3_isp, IRQ3_ISP_V, ___ISR_Handler);
153isp( _irq4_isp, IRQ4_ISP_V, ___ISR_Handler);
154isp( _irq5_isp, IRQ5_ISP_V, ___ISR_Handler);
155isp( _irq6_isp, IRQ6_ISP_V, ___ISR_Handler);
156isp( _irq7_isp, IRQ7_ISP_V, ___ISR_Handler);
157
158/*****************************
159 * DMA - controller
160 *****************************/
161isp( _dma0_isp, DMA0_ISP_V, ___ISR_Handler);
162isp( _dma1_isp, DMA1_ISP_V, ___ISR_Handler);
163isp( _dma2_isp, DMA2_ISP_V, ___ISR_Handler);
164isp( _dma3_isp, DMA3_ISP_V, ___ISR_Handler);
165
166
167/*****************************
168 * Interrupt timer unit
169 *****************************/
170
171/*****************************
172 * Timer 0
173 *****************************/
174isp( _imia0_isp, IMIA0_ISP_V, ___ISR_Handler);
175isp( _imib0_isp, IMIB0_ISP_V, ___ISR_Handler);
176isp( _ovi0_isp,  OVI0_ISP_V, ___ISR_Handler);
177
178/*****************************
179 * Timer 1
180 *****************************/
181isp( _imia1_isp, IMIA1_ISP_V, ___ISR_Handler);
182isp( _imib1_isp, IMIB1_ISP_V, ___ISR_Handler);
183isp( _ovi1_isp,  OVI1_ISP_V, ___ISR_Handler);
184
185/*****************************
186 * Timer 2
187 *****************************/
188isp( _imia2_isp, IMIA2_ISP_V, ___ISR_Handler);
189isp( _imib2_isp, IMIB2_ISP_V, ___ISR_Handler);
190isp( _ovi2_isp,  OVI2_ISP_V, ___ISR_Handler);
191
192/*****************************
193 * Timer 3
194 *****************************/
195isp( _imia3_isp, IMIA3_ISP_V, ___ISR_Handler);
196isp( _imib3_isp, IMIB3_ISP_V, ___ISR_Handler);
197isp( _ovi3_isp,  OVI3_ISP_V, ___ISR_Handler);
198
199/*****************************
200 * Timer 4
201 *****************************/
202isp( _imia4_isp, IMIA4_ISP_V, ___ISR_Handler);
203isp( _imib4_isp, IMIB4_ISP_V, ___ISR_Handler);
204isp( _ovi4_isp,  OVI4_ISP_V, ___ISR_Handler);
205
206
207/*****************************
208 * Serial interfaces
209 *****************************/
210
211/*****************************
212 * Serial interface 0
213 *****************************/
214isp( _eri0_isp,  ERI0_ISP_V, ___ISR_Handler);
215isp( _rxi0_isp,  RXI0_ISP_V, ___ISR_Handler);
216isp( _txi0_isp,  TXI0_ISP_V, ___ISR_Handler);
217isp( _tei0_isp,  TEI0_ISP_V, ___ISR_Handler);
218
219/*****************************
220 * Serial interface 1
221 *****************************/
222isp( _eri1_isp,  ERI1_ISP_V, ___ISR_Handler);
223isp( _rxi1_isp,  RXI1_ISP_V, ___ISR_Handler);
224isp( _txi1_isp,  TXI1_ISP_V, ___ISR_Handler);
225isp( _tei1_isp,  TEI1_ISP_V, ___ISR_Handler);
226
227
228/*****************************
229 * Parity control unit of
230 * the bus state controller
231 *****************************/
232isp( _prt_isp,  PRT_ISP_V, ___ISR_Handler);
233
234
235/******************************
236 * Analog digital converter
237 * ADC
238 ******************************/
239isp( _adu_isp,  ADU_ISP_V, ___ISR_Handler);
240
241
242/******************************
243 *  Watchdog timer
244 ******************************/
245isp( _wdt_isp,  WDT_ISP_V, ___ISR_Handler);
246
247
248/******************************
249 * DRAM refresh control unit
250 * of bus state controller
251 ******************************/
252isp( _dref_isp,  DREF_ISP_V, ___ISR_Handler);
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