1 | /* |
---|
2 | * This file contains the basic algorithms for all assembly code used |
---|
3 | * in an specific CPU port of RTEMS. These algorithms must be implemented |
---|
4 | * in assembly language |
---|
5 | * |
---|
6 | * NOTE: This port uses a C file with inline assembler instructions |
---|
7 | * |
---|
8 | * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and |
---|
9 | * Bernd Becker (becker@faw.uni-ulm.de) |
---|
10 | * |
---|
11 | * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany |
---|
12 | * |
---|
13 | * This program is distributed in the hope that it will be useful, |
---|
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
---|
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
---|
16 | * |
---|
17 | * |
---|
18 | * COPYRIGHT (c) 1998. |
---|
19 | * On-Line Applications Research Corporation (OAR). |
---|
20 | * |
---|
21 | * The license and distribution terms for this file may be |
---|
22 | * found in the file LICENSE in this distribution or at |
---|
23 | * http://www.OARcorp.com/rtems/license.html. |
---|
24 | * |
---|
25 | * $Id$ |
---|
26 | */ |
---|
27 | |
---|
28 | /* |
---|
29 | * This is supposed to be an assembly file. This means that system.h |
---|
30 | * and cpu.h should not be included in a "real" cpu_asm file. An |
---|
31 | * implementation in assembly should include "cpu_asm.h" |
---|
32 | */ |
---|
33 | |
---|
34 | #include <rtems/system.h> |
---|
35 | #include <rtems/score/cpu.h> |
---|
36 | #include <rtems/score/isr.h> |
---|
37 | #include <rtems/score/thread.h> |
---|
38 | #include <rtems/score/sh.h> |
---|
39 | |
---|
40 | #include <rtems/score/ispsh7032.h> |
---|
41 | #include <rtems/score/iosh7032.h> |
---|
42 | #include <rtems/score/sh_io.h> |
---|
43 | |
---|
44 | /* from cpu_isps.c */ |
---|
45 | extern proc_ptr _Hardware_isr_Table[]; |
---|
46 | |
---|
47 | #if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) |
---|
48 | unsigned long *_old_stack_ptr; |
---|
49 | #endif |
---|
50 | |
---|
51 | register unsigned long *stack_ptr asm("r15"); |
---|
52 | |
---|
53 | /* |
---|
54 | * sh_set_irq_priority |
---|
55 | * |
---|
56 | * this function sets the interrupt level of the specified interrupt |
---|
57 | * |
---|
58 | * parameters: |
---|
59 | * - irq : interrupt number |
---|
60 | * - prio: priority to set for this interrupt number |
---|
61 | * |
---|
62 | * returns: 0 if ok |
---|
63 | * -1 on error |
---|
64 | */ |
---|
65 | |
---|
66 | unsigned int sh_set_irq_priority( |
---|
67 | unsigned int irq, |
---|
68 | unsigned int prio ) |
---|
69 | { |
---|
70 | unsigned32 shiftcount; |
---|
71 | unsigned32 prioreg; |
---|
72 | unsigned16 temp16; |
---|
73 | unsigned32 level; |
---|
74 | |
---|
75 | /* |
---|
76 | * first check for valid interrupt |
---|
77 | */ |
---|
78 | if(( irq > 113) || (_Hardware_isr_Table[irq] == _dummy_isp)) |
---|
79 | return -1; |
---|
80 | /* |
---|
81 | * check for valid irq priority |
---|
82 | */ |
---|
83 | if( prio > 15 ) |
---|
84 | return -1; |
---|
85 | |
---|
86 | /* |
---|
87 | * look up appropriate interrupt priority register |
---|
88 | */ |
---|
89 | if( irq > 71) |
---|
90 | { |
---|
91 | irq = irq - 72; |
---|
92 | shiftcount = 12 - ((irq & ~0x03) % 16); |
---|
93 | |
---|
94 | switch( irq / 16) |
---|
95 | { |
---|
96 | case 0: { prioreg = INTC_IPRC; break;} |
---|
97 | case 1: { prioreg = INTC_IPRD; break;} |
---|
98 | case 2: { prioreg = INTC_IPRE; break;} |
---|
99 | default: return -1; |
---|
100 | } |
---|
101 | } |
---|
102 | else |
---|
103 | { |
---|
104 | shiftcount = 12 - 4 * ( irq % 4); |
---|
105 | if( irq > 67) |
---|
106 | prioreg = INTC_IPRB; |
---|
107 | else |
---|
108 | prioreg = INTC_IPRA; |
---|
109 | } |
---|
110 | |
---|
111 | /* |
---|
112 | * Set the interrupt priority register |
---|
113 | */ |
---|
114 | _CPU_ISR_Disable( level ); |
---|
115 | |
---|
116 | temp16 = read16( prioreg); |
---|
117 | temp16 &= ~( 15 << shiftcount); |
---|
118 | temp16 |= prio << shiftcount; |
---|
119 | write16( temp16, prioreg); |
---|
120 | |
---|
121 | _CPU_ISR_Enable( level ); |
---|
122 | |
---|
123 | return 0; |
---|
124 | } |
---|
125 | |
---|
126 | /* |
---|
127 | * _CPU_Context_save_fp_context |
---|
128 | * |
---|
129 | * This routine is responsible for saving the FP context |
---|
130 | * at *fp_context_ptr. If the point to load the FP context |
---|
131 | * from is changed then the pointer is modified by this routine. |
---|
132 | * |
---|
133 | * Sometimes a macro implementation of this is in cpu.h which dereferences |
---|
134 | * the ** and a similarly named routine in this file is passed something |
---|
135 | * like a (Context_Control_fp *). The general rule on making this decision |
---|
136 | * is to avoid writing assembly language. |
---|
137 | */ |
---|
138 | |
---|
139 | void _CPU_Context_save_fp( |
---|
140 | void **fp_context_ptr |
---|
141 | ) |
---|
142 | { |
---|
143 | } |
---|
144 | |
---|
145 | /* |
---|
146 | * _CPU_Context_restore_fp_context |
---|
147 | * |
---|
148 | * This routine is responsible for restoring the FP context |
---|
149 | * at *fp_context_ptr. If the point to load the FP context |
---|
150 | * from is changed then the pointer is modified by this routine. |
---|
151 | * |
---|
152 | * Sometimes a macro implementation of this is in cpu.h which dereferences |
---|
153 | * the ** and a similarly named routine in this file is passed something |
---|
154 | * like a (Context_Control_fp *). The general rule on making this decision |
---|
155 | * is to avoid writing assembly language. |
---|
156 | */ |
---|
157 | |
---|
158 | void _CPU_Context_restore_fp( |
---|
159 | void **fp_context_ptr |
---|
160 | ) |
---|
161 | { |
---|
162 | } |
---|
163 | |
---|
164 | /* _CPU_Context_switch |
---|
165 | * |
---|
166 | * This routine performs a normal non-FP context switch. |
---|
167 | */ |
---|
168 | |
---|
169 | /* within __CPU_Context_switch: |
---|
170 | * _CPU_Context_switch |
---|
171 | * _CPU_Context_restore |
---|
172 | * |
---|
173 | * This routine is generally used only to restart self in an |
---|
174 | * efficient manner. It may simply be a label in _CPU_Context_switch. |
---|
175 | * |
---|
176 | * NOTE: It should be safe not to store r4, r5 |
---|
177 | * |
---|
178 | * NOTE: It is doubtful if r0 is really needed to be stored |
---|
179 | * |
---|
180 | * NOTE: gbr is added, but should not be necessary, as it is |
---|
181 | * only used globally in this port. |
---|
182 | */ |
---|
183 | |
---|
184 | /* |
---|
185 | * FIXME: This is an ugly hack, but we wanted to avoid recalculating |
---|
186 | * the offset each time Context_Control is changed |
---|
187 | */ |
---|
188 | void __CPU_Context_switch( |
---|
189 | Context_Control *run, /* r4 */ |
---|
190 | Context_Control *heir /* r5 */ |
---|
191 | ) |
---|
192 | { |
---|
193 | |
---|
194 | asm volatile( |
---|
195 | ".global __CPU_Context_switch\n" |
---|
196 | "__CPU_Context_switch:\n" |
---|
197 | |
---|
198 | " add %0,r4\n" |
---|
199 | |
---|
200 | " stc.l sr,@-r4\n" |
---|
201 | " stc.l gbr,@-r4\n" |
---|
202 | " mov.l r0,@-r4\n" |
---|
203 | " mov.l r1,@-r4\n" |
---|
204 | " mov.l r2,@-r4\n" |
---|
205 | " mov.l r3,@-r4\n" |
---|
206 | |
---|
207 | " mov.l r6,@-r4\n" |
---|
208 | " mov.l r7,@-r4\n" |
---|
209 | " mov.l r8,@-r4\n" |
---|
210 | " mov.l r9,@-r4\n" |
---|
211 | " mov.l r10,@-r4\n" |
---|
212 | " mov.l r11,@-r4\n" |
---|
213 | " mov.l r12,@-r4\n" |
---|
214 | " mov.l r13,@-r4\n" |
---|
215 | " mov.l r14,@-r4\n" |
---|
216 | " sts.l pr,@-r4\n" |
---|
217 | " sts.l mach,@-r4\n" |
---|
218 | " sts.l macl,@-r4\n" |
---|
219 | " mov.l r15,@-r4\n" |
---|
220 | |
---|
221 | " mov r5, r4\n" |
---|
222 | :: "I" (sizeof(Context_Control)) |
---|
223 | ); |
---|
224 | |
---|
225 | asm volatile( |
---|
226 | ".global __CPU_Context_restore\n" |
---|
227 | "__CPU_Context_restore:\n" |
---|
228 | " mov.l @r4+,r15\n" |
---|
229 | " lds.l @r4+,macl\n" |
---|
230 | " lds.l @r4+,mach\n" |
---|
231 | " lds.l @r4+,pr\n" |
---|
232 | " mov.l @r4+,r14\n" |
---|
233 | " mov.l @r4+,r13\n" |
---|
234 | " mov.l @r4+,r12\n" |
---|
235 | " mov.l @r4+,r11\n" |
---|
236 | " mov.l @r4+,r10\n" |
---|
237 | " mov.l @r4+,r9\n" |
---|
238 | " mov.l @r4+,r8\n" |
---|
239 | " mov.l @r4+,r7\n" |
---|
240 | " mov.l @r4+,r6\n" |
---|
241 | |
---|
242 | " mov.l @r4+,r3\n" |
---|
243 | " mov.l @r4+,r2\n" |
---|
244 | " mov.l @r4+,r1\n" |
---|
245 | " mov.l @r4+,r0\n" |
---|
246 | " ldc.l @r4+,gbr\n" |
---|
247 | " ldc.l @r4+,sr\n" |
---|
248 | |
---|
249 | " rts\n" |
---|
250 | " nop\n" ); |
---|
251 | } |
---|
252 | |
---|
253 | /* |
---|
254 | * This routine provides the RTEMS interrupt management. |
---|
255 | */ |
---|
256 | |
---|
257 | void __ISR_Handler( unsigned32 vector) |
---|
258 | { |
---|
259 | register unsigned32 level; |
---|
260 | |
---|
261 | _CPU_ISR_Disable( level ); |
---|
262 | |
---|
263 | _Thread_Dispatch_disable_level++; |
---|
264 | |
---|
265 | #if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) |
---|
266 | if( _ISR_Nest_level == 0 ) |
---|
267 | { |
---|
268 | /* Install irq stack */ |
---|
269 | _old_stack_ptr = stack_ptr; |
---|
270 | stack_ptr = _CPU_Interrupt_stack_high; |
---|
271 | } |
---|
272 | |
---|
273 | #endif |
---|
274 | |
---|
275 | _ISR_Nest_level++; |
---|
276 | |
---|
277 | _CPU_ISR_Enable( level ); |
---|
278 | |
---|
279 | /* call isp */ |
---|
280 | if( _ISR_Vector_table[ vector]) |
---|
281 | (*_ISR_Vector_table[ vector ])( vector ); |
---|
282 | |
---|
283 | _CPU_ISR_Disable( level ); |
---|
284 | |
---|
285 | _Thread_Dispatch_disable_level--; |
---|
286 | |
---|
287 | _ISR_Nest_level--; |
---|
288 | |
---|
289 | #if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) |
---|
290 | |
---|
291 | if( _ISR_Nest_level == 0 ) |
---|
292 | /* restore old stack pointer */ |
---|
293 | stack_ptr = _old_stack_ptr; |
---|
294 | #endif |
---|
295 | |
---|
296 | _CPU_ISR_Enable( level ); |
---|
297 | |
---|
298 | if ( _ISR_Nest_level ) |
---|
299 | return; |
---|
300 | |
---|
301 | if ( _Thread_Dispatch_disable_level ) { |
---|
302 | _ISR_Signals_to_thread_executing = FALSE; |
---|
303 | return; |
---|
304 | } |
---|
305 | |
---|
306 | if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) { |
---|
307 | _ISR_Signals_to_thread_executing = FALSE; |
---|
308 | _Thread_Dispatch(); |
---|
309 | } |
---|
310 | } |
---|