source: rtems/c/src/lib/libcpu/powerpc/shared/io.h @ 3a96054

4.104.114.84.95
Last change on this file since 3a96054 was fcee56c0, checked in by Joel Sherrill <joel.sherrill@…>, on 07/01/99 at 23:39:13

Patch from Eric Valette <valette@…> to clean up the
previous submission.

  • Property mode set to 100644
File size: 3.3 KB
Line 
1/*
2 * io.h
3 *
4 *          This file contains inline implementation of function to
5 *          deal with IO.
6 *
7 * It is a stripped down version of linux ppc file...
8 *
9 * Copyright (C) 1999  Eric Valette (valette@crf.canon.fr)
10 *                     Canon Centre Recherche France.
11 *
12 *  The license and distribution terms for this file may be
13 *  found in found in the file LICENSE in this distribution or at
14 *  http://www.OARcorp.com/rtems/license.html.
15 *
16 *  $Id$
17 */
18#ifndef _LIBCPU_IO_H_
19#define _LIBCPU_IO_H_
20
21
22#define PREP_ISA_IO_BASE        0x80000000
23#define PREP_ISA_MEM_BASE       0xc0000000
24#define PREP_PCI_DRAM_OFFSET    0x80000000
25
26#define _IO_BASE        PREP_ISA_IO_BASE
27#define _ISA_MEM_BASE   PREP_ISA_MEM_BASE
28#define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
29
30#ifndef ASM
31
32#define inb(port)               in_8((unsigned char *)((port)+_IO_BASE))
33#define outb(val, port)         out_8((unsigned char *)((port)+_IO_BASE), (val))
34#define inw(port)               in_le16((unsigned short *)((port)+_IO_BASE))
35#define outw(val, port)         out_le16((unsigned short *)((port)+_IO_BASE), (val))
36#define inl(port)               in_le32((unsigned *)((port)+_IO_BASE))
37#define outl(val, port)         out_le32((unsigned *)((port)+_IO_BASE), (val))
38
39/*
40 * Enforce In-order Execution of I/O:
41 * Acts as a barrier to ensure all previous I/O accesses have
42 * completed before any further ones are issued.
43 */
44extern inline void eieio(void)
45{
46        __asm__ __volatile__ ("eieio");
47}
48
49
50/* Enforce in-order execution of data I/O.
51 * No distinction between read/write on PPC; use eieio for all three.
52 */
53#define iobarrier_rw() eieio()
54#define iobarrier_r()  eieio()
55#define iobarrier_w()  eieio()
56
57/*
58 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
59 */
60extern inline int in_8(volatile unsigned char *addr)
61{
62        int ret;
63
64        __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
65        return ret;
66}
67
68extern inline void out_8(volatile unsigned char *addr, int val)
69{
70        __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
71}
72
73extern inline int in_le16(volatile unsigned short *addr)
74{
75        int ret;
76
77        __asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
78                              "r" (addr), "m" (*addr));
79        return ret;
80}
81
82extern inline int in_be16(volatile unsigned short *addr)
83{
84        int ret;
85
86        __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
87        return ret;
88}
89
90extern inline void out_le16(volatile unsigned short *addr, int val)
91{
92        __asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
93                              "r" (val), "r" (addr));
94}
95
96extern inline void out_be16(volatile unsigned short *addr, int val)
97{
98        __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
99}
100
101extern inline unsigned in_le32(volatile unsigned *addr)
102{
103        unsigned ret;
104
105        __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
106                             "r" (addr), "m" (*addr));
107        return ret;
108}
109
110extern inline unsigned in_be32(volatile unsigned *addr)
111{
112        unsigned ret;
113
114        __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
115        return ret;
116}
117
118extern inline void out_le32(volatile unsigned *addr, int val)
119{
120        __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
121                             "r" (val), "r" (addr));
122}
123
124extern inline void out_be32(volatile unsigned *addr, int val)
125{
126        __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
127}
128
129#endif /* ASM */
130#endif /* _LIBCPU_IO_H_ */
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