source: rtems/c/src/lib/libcpu/powerpc/shared/include/io.h @ 0feb8085

4.104.115
Last change on this file since 0feb8085 was 0feb8085, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 25, 2009 at 2:58:05 PM

2009-09-25 Joel Sherrill <joel.sherrill@…>

  • shared/include/io.h, shared/include/mmu.h: Change extern inline to static inline.
  • Property mode set to 100644
File size: 3.6 KB
Line 
1/*
2 * io.h
3 *
4 *          This file contains inline implementation of function to
5 *          deal with IO.
6 *
7 * It is a stripped down version of linux ppc file...
8 *
9 * Copyright (C) 1999  Eric Valette (valette@crf.canon.fr)
10 *                     Canon Centre Recherche France.
11 *
12 *  The license and distribution terms for this file may be
13 *  found in found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 */
18#ifndef _LIBCPU_IO_H
19#define _LIBCPU_IO_H
20
21
22#define PREP_ISA_IO_BASE        0x80000000
23#define PREP_ISA_MEM_BASE       0xc0000000
24#define PREP_PCI_DRAM_OFFSET    0x80000000
25
26#define CHRP_ISA_IO_BASE        0xfe000000
27#define CHRP_ISA_MEM_BASE       0xfd000000
28#define CHRP_PCI_DRAM_OFFSET    0x00000000
29
30/* _IO_BASE, _ISA_MEM_BASE, PCI_DRAM_OFFSET are now defined by bsp.h */
31
32#ifndef ASM
33
34#include <bsp.h>                /* for _IO_BASE & friends */
35
36/* NOTE: The use of these macros is DISCOURAGED.
37 *       you should consider e.g. using in_xxx / out_xxx
38 *       with a device specific base address that is
39 *       defined by the BSP. This makes drivers easier
40 *       to port.
41 */
42#define inb(port)               in_8((unsigned char *)((port)+_IO_BASE))
43#define outb(val, port)         out_8((unsigned char *)((port)+_IO_BASE), (val))
44#define inw(port)               in_le16((unsigned short *)((port)+_IO_BASE))
45#define outw(val, port)         out_le16((unsigned short *)((port)+_IO_BASE), (val))
46#define inl(port)               in_le32((unsigned *)((port)+_IO_BASE))
47#define outl(val, port)         out_le32((unsigned *)((port)+_IO_BASE), (val))
48
49/*
50 * Enforce In-order Execution of I/O:
51 * Acts as a barrier to ensure all previous I/O accesses have
52 * completed before any further ones are issued.
53 */
54static inline void eieio(void)
55{
56        __asm__ __volatile__ ("eieio");
57}
58
59
60/* Enforce in-order execution of data I/O.
61 * No distinction between read/write on PPC; use eieio for all three.
62 */
63#define iobarrier_rw() eieio()
64#define iobarrier_r()  eieio()
65#define iobarrier_w()  eieio()
66
67/*
68 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
69 */
70static inline int in_8(volatile unsigned char *addr)
71{
72        int ret;
73
74        __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
75        return ret;
76}
77
78static inline void out_8(volatile unsigned char *addr, int val)
79{
80        __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
81}
82
83static inline int in_le16(volatile unsigned short *addr)
84{
85        int ret;
86
87        __asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
88                              "r" (addr), "m" (*addr));
89        return ret;
90}
91
92static inline int in_be16(volatile unsigned short *addr)
93{
94        int ret;
95
96        __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
97        return ret;
98}
99
100static inline void out_le16(volatile unsigned short *addr, int val)
101{
102        __asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
103                              "r" (val), "r" (addr));
104}
105
106static inline void out_be16(volatile unsigned short *addr, int val)
107{
108        __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
109}
110
111static inline unsigned in_le32(volatile unsigned *addr)
112{
113        unsigned ret;
114
115        __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
116                             "r" (addr), "m" (*addr));
117        return ret;
118}
119
120static inline unsigned in_be32(volatile unsigned *addr)
121{
122        unsigned ret;
123
124        __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
125        return ret;
126}
127
128static inline void out_le32(volatile unsigned *addr, int val)
129{
130        __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
131                             "r" (val), "r" (addr));
132}
133
134static inline void out_be32(volatile unsigned *addr, int val)
135{
136        __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
137}
138
139#endif /* ASM */
140#endif /* _LIBCPU_IO_H */
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