[f054b51] | 1 | /* |
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| 2 | * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr) |
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| 3 | * Canon Centre Recherche France. |
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| 4 | * |
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| 5 | * Added MPC8260 Andy Dachs <a.dachs@sstl.co.uk> |
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| 6 | * Surrey Satellite Technology Limited |
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| 7 | * |
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| 8 | * |
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| 9 | * The license and distribution terms for this file may be |
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[e71a3a84] | 10 | * found in the file LICENSE in this distribution or at |
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[c499856] | 11 | * http://www.rtems.org/license/LICENSE. |
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[f054b51] | 12 | */ |
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| 13 | |
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[a859df85] | 14 | #ifndef _LIBCPU_CPUIDENT_H |
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| 15 | #define _LIBCPU_CPUIDENT_H |
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[f054b51] | 16 | |
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[25a92bc1] | 17 | #include <stdbool.h> |
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| 18 | |
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[e08dbc5] | 19 | #ifdef __cplusplus |
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| 20 | extern "C" { |
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| 21 | #endif |
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| 22 | |
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[f054b51] | 23 | #ifndef ASM |
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| 24 | typedef enum |
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| 25 | { |
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| 26 | PPC_601 = 0x1, |
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[9c4a30e2] | 27 | PPC_5XX = 0x2, |
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[f054b51] | 28 | PPC_603 = 0x3, |
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| 29 | PPC_604 = 0x4, |
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| 30 | PPC_603e = 0x6, |
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| 31 | PPC_603ev = 0x7, |
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| 32 | PPC_750 = 0x8, |
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[848007c] | 33 | PPC_750_IBM = 0x7000, |
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[f054b51] | 34 | PPC_604e = 0x9, |
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| 35 | PPC_604r = 0xA, |
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[d49389a] | 36 | PPC_7400 = 0xC, |
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[16a8616] | 37 | PPC_405 = 0x2001, /* Xilinx Virtex-II Pro or -4 */ |
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[3c6fe2e] | 38 | PPC_405EX = 0x1291, /* + 405EXr */ |
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| 39 | PPC_405GP = 0x4011, /* + 405CR */ |
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| 40 | PPC_405GPr = 0x5091, |
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| 41 | PPC_405EZ = 0x4151, |
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| 42 | PPC_405EP = 0x5121, |
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[16a8616] | 43 | PPC_440 = 0x7ff2, /* Xilinx Virtex-5*/ |
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[83d7232] | 44 | PPC_7455 = 0x8001, /* Kate Feng */ |
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[408bb71] | 45 | PPC_7457 = 0x8002, |
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[f054b51] | 46 | PPC_620 = 0x16, |
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| 47 | PPC_860 = 0x50, |
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| 48 | PPC_821 = PPC_860, |
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[9c4a30e2] | 49 | PPC_823 = PPC_860, |
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[f054b51] | 50 | PPC_8260 = 0x81, |
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[a84392d] | 51 | PPC_8240 = PPC_8260, |
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| 52 | PPC_8245 = 0x8081, |
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[e955b06] | 53 | PPC_8540 = 0x8020, |
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[644448f] | 54 | PPC_e500v2 = 0x8021, |
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[f6660bfb] | 55 | PPC_e6500 = 0x8040, |
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[56c4cae] | 56 | PPC_603le = 0x8082, /* 603le core, in MGT5100 and MPC5200 */ |
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[f610e83f] | 57 | PPC_e300c1 = 0x8083, /* e300c1 core, in MPC83xx*/ |
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| 58 | PPC_e300c2 = 0x8084, /* e300c2 core */ |
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| 59 | PPC_e300c3 = 0x8085, /* e300c3 core */ |
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[b2aa729] | 60 | PPC_e200z0 = 0x8170, |
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| 61 | PPC_e200z1 = 0x8140, |
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[3020614] | 62 | PPC_e200z4 = 0x8150, |
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[b2aa729] | 63 | PPC_e200z6 = 0x8110, |
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| 64 | PPC_e200z7 = 0x8160, |
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[29313369] | 65 | PPC_PSIM = 0xfffe, /* GDB PowerPC simulator -- fake version */ |
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[a84392d] | 66 | PPC_UNKNOWN = 0xffff |
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[f054b51] | 67 | } ppc_cpu_id_t; |
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| 68 | |
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[e955b06] | 69 | /* Bitfield of for identifying features or groups of cpu flavors. |
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| 70 | * DO NOT USE DIRECTLY (as implementation may change) |
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| 71 | * only use the 'ppc_is_xxx() / ppc_has_xxx()' macros/inlines |
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| 72 | * below. |
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| 73 | */ |
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| 74 | |
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[359e537] | 75 | typedef struct { |
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[e955b06] | 76 | unsigned has_altivec : 1; |
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| 77 | unsigned has_fpu : 1; |
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| 78 | unsigned has_hw_ptbl_lkup : 1; |
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[4be2812f] | 79 | #define PPC_BOOKE_405 1 /* almost like booke but with some significant differences */ |
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| 80 | #define PPC_BOOKE_STD 2 |
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| 81 | #define PPC_BOOKE_E500 3 /* bookE with extensions */ |
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| 82 | unsigned is_bookE : 2; |
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[e955b06] | 83 | unsigned has_16byte_clne : 1; |
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| 84 | unsigned is_60x : 1; |
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| 85 | unsigned has_8_bats : 1; |
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| 86 | unsigned has_epic : 1; |
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[76a5a3cc] | 87 | unsigned has_shadowed_gprs : 1; |
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[e955b06] | 88 | } ppc_feature_t; |
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| 89 | |
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| 90 | extern ppc_feature_t current_ppc_features; |
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[bfc9b023] | 91 | extern ppc_cpu_id_t current_ppc_cpu; |
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| 92 | |
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| 93 | typedef unsigned short ppc_cpu_revision_t; |
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| 94 | |
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[73406bf] | 95 | extern ppc_cpu_id_t get_ppc_cpu_type (void); |
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[9521992] | 96 | extern const char *get_ppc_cpu_type_name(ppc_cpu_id_t cpu); |
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[73406bf] | 97 | extern ppc_cpu_revision_t get_ppc_cpu_revision (void); |
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[bfc9b023] | 98 | extern ppc_cpu_revision_t current_ppc_revision; |
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[e955b06] | 99 | |
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| 100 | /* PUBLIC ACCESS ROUTINES */ |
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| 101 | #define _PPC_FEAT_DECL(x) \ |
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[73406bf] | 102 | static inline unsigned ppc_cpu_##x(void) { \ |
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[bfc9b023] | 103 | if ( PPC_UNKNOWN == current_ppc_cpu ) \ |
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| 104 | get_ppc_cpu_type(); \ |
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| 105 | return current_ppc_features.x; \ |
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| 106 | } |
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[e955b06] | 107 | |
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| 108 | _PPC_FEAT_DECL(has_altivec) |
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| 109 | /* has_fpu not implemented yet */ |
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| 110 | _PPC_FEAT_DECL(has_hw_ptbl_lkup) |
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| 111 | _PPC_FEAT_DECL(is_bookE) |
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| 112 | _PPC_FEAT_DECL(is_60x) |
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| 113 | _PPC_FEAT_DECL(has_8_bats) |
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| 114 | _PPC_FEAT_DECL(has_epic) |
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[76a5a3cc] | 115 | _PPC_FEAT_DECL(has_shadowed_gprs) |
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[25a92bc1] | 116 | |
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[2d2de4eb] | 117 | #undef _PPC_FEAT_DECL |
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| 118 | |
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| 119 | static inline ppc_cpu_id_t ppc_cpu_current(void) |
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| 120 | { |
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| 121 | return current_ppc_cpu; |
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| 122 | } |
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| 123 | |
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[73406bf] | 124 | static inline bool ppc_cpu_is_e200(void) |
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[644448f] | 125 | { |
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[3020614] | 126 | return (ppc_cpu_current() & 0xff80) == 0x8100; |
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[644448f] | 127 | } |
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| 128 | |
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[39de538] | 129 | static inline bool ppc_cpu_is_specific_e200(ppc_cpu_id_t id) |
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| 130 | { |
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| 131 | return (ppc_cpu_current() & 0xfff0) == id; |
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| 132 | } |
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| 133 | |
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[73406bf] | 134 | static inline bool ppc_cpu_is_e300(void) |
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[25a92bc1] | 135 | { |
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[2d2de4eb] | 136 | return ppc_cpu_current() == PPC_e300c1 |
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| 137 | || ppc_cpu_current() == PPC_e300c2 |
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| 138 | || ppc_cpu_current() == PPC_e300c3; |
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| 139 | } |
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| 140 | |
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[73406bf] | 141 | static inline bool ppc_cpu_is_e500(void) |
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[644448f] | 142 | { |
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| 143 | return ppc_cpu_current() == PPC_8540 |
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| 144 | || ppc_cpu_current() == PPC_e500v2; |
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| 145 | } |
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| 146 | |
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[2d2de4eb] | 147 | static inline bool ppc_cpu_is(ppc_cpu_id_t cpu) |
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| 148 | { |
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| 149 | return ppc_cpu_current() == cpu; |
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[25a92bc1] | 150 | } |
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[e955b06] | 151 | |
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[f054b51] | 152 | #endif /* ASM */ |
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| 153 | |
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[e08dbc5] | 154 | #ifdef __cplusplus |
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| 155 | } |
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| 156 | #endif |
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| 157 | |
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[f054b51] | 158 | #endif |
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