source: rtems/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h @ 697a6ca

5
Last change on this file since 697a6ca was 848007c, checked in by Phong Pham <phamp@…>, on 05/07/17 at 21:08:17

Add support for IBM PowerPC 750 chip.

Closes #3015.

  • Property mode set to 100755
File size: 3.7 KB
RevLine 
[f054b51]1/*
2 * Copyright (C) 1999  Eric Valette (valette@crf.canon.fr)
3 *                     Canon Centre Recherche France.
4 *
5 *  Added MPC8260 Andy Dachs <a.dachs@sstl.co.uk>
6 *  Surrey Satellite Technology Limited
7 *
8 *
9 *  The license and distribution terms for this file may be
[e71a3a84]10 *  found in the file LICENSE in this distribution or at
[c499856]11 *  http://www.rtems.org/license/LICENSE.
[f054b51]12 */
13
[a859df85]14#ifndef _LIBCPU_CPUIDENT_H
15#define _LIBCPU_CPUIDENT_H
[f054b51]16
[25a92bc1]17#include <stdbool.h>
18
[e08dbc5]19#ifdef __cplusplus
20extern "C" {
21#endif
22
[f054b51]23#ifndef ASM
24typedef enum
25{
26  PPC_601 = 0x1,
[9c4a30e2]27  PPC_5XX = 0x2,
[f054b51]28  PPC_603 = 0x3,
29  PPC_604 = 0x4,
30  PPC_603e = 0x6,
31  PPC_603ev = 0x7,
32  PPC_750 = 0x8,
[848007c]33  PPC_750_IBM = 0x7000,
[f054b51]34  PPC_604e = 0x9,
35  PPC_604r = 0xA,
[d49389a]36  PPC_7400 = 0xC,
[16a8616]37  PPC_405  = 0x2001,  /* Xilinx Virtex-II Pro or -4 */
[3c6fe2e]38  PPC_405EX = 0x1291,   /* + 405EXr */
39  PPC_405GP = 0x4011,   /* + 405CR */
40  PPC_405GPr = 0x5091,
41  PPC_405EZ = 0x4151,
42  PPC_405EP = 0x5121,
[16a8616]43  PPC_440 = 0x7ff2,  /* Xilinx Virtex-5*/
[83d7232]44  PPC_7455 = 0x8001, /* Kate Feng */
[408bb71]45  PPC_7457 = 0x8002,
[f054b51]46  PPC_620 = 0x16,
47  PPC_860 = 0x50,
48  PPC_821 = PPC_860,
[9c4a30e2]49  PPC_823 = PPC_860,
[f054b51]50  PPC_8260 = 0x81,
[a84392d]51  PPC_8240 = PPC_8260,
52  PPC_8245 = 0x8081,
[e955b06]53  PPC_8540 = 0x8020,
[644448f]54  PPC_e500v2 = 0x8021,
[f6660bfb]55  PPC_e6500 = 0x8040,
[56c4cae]56  PPC_603le = 0x8082, /* 603le core, in MGT5100 and MPC5200 */
[f610e83f]57  PPC_e300c1  = 0x8083, /* e300c1  core, in MPC83xx*/
58  PPC_e300c2  = 0x8084, /* e300c2  core */
59  PPC_e300c3  = 0x8085, /* e300c3  core */
[b2aa729]60  PPC_e200z0  = 0x8170,
61  PPC_e200z1  = 0x8140,
[3020614]62  PPC_e200z4  = 0x8150,
[b2aa729]63  PPC_e200z6  = 0x8110,
64  PPC_e200z7  = 0x8160,
[29313369]65  PPC_PSIM    = 0xfffe,  /* GDB PowerPC simulator -- fake version */
[a84392d]66  PPC_UNKNOWN = 0xffff
[f054b51]67} ppc_cpu_id_t;
68
[e955b06]69/* Bitfield of for identifying features or groups of cpu flavors.
70 * DO NOT USE DIRECTLY (as implementation may change)
71 * only use the 'ppc_is_xxx() / ppc_has_xxx()' macros/inlines
72 * below.
73 */
74
[359e537]75typedef struct {
[e955b06]76        unsigned has_altivec            : 1;
77        unsigned has_fpu                        : 1;
78        unsigned has_hw_ptbl_lkup       : 1;
[4be2812f]79#define PPC_BOOKE_405   1       /* almost like booke but with some significant differences */
80#define PPC_BOOKE_STD   2
81#define PPC_BOOKE_E500  3       /* bookE with extensions */
82        unsigned is_bookE                       : 2;
[e955b06]83        unsigned has_16byte_clne        : 1;
84        unsigned is_60x             : 1;
85        unsigned has_8_bats                     : 1;
86        unsigned has_epic           : 1;
[76a5a3cc]87        unsigned has_shadowed_gprs  : 1;
[e955b06]88} ppc_feature_t;
89
90extern ppc_feature_t   current_ppc_features;
[bfc9b023]91extern ppc_cpu_id_t current_ppc_cpu;
92
93typedef unsigned short ppc_cpu_revision_t;
94
[73406bf]95extern ppc_cpu_id_t get_ppc_cpu_type (void);
[9521992]96extern const char *get_ppc_cpu_type_name(ppc_cpu_id_t cpu);
[73406bf]97extern ppc_cpu_revision_t get_ppc_cpu_revision (void);
[bfc9b023]98extern ppc_cpu_revision_t current_ppc_revision;
[e955b06]99
100/* PUBLIC ACCESS ROUTINES */
101#define _PPC_FEAT_DECL(x) \
[73406bf]102static inline unsigned ppc_cpu_##x(void) { \
[bfc9b023]103  if ( PPC_UNKNOWN == current_ppc_cpu ) \
104    get_ppc_cpu_type(); \
105  return current_ppc_features.x; \
106}
[e955b06]107
108_PPC_FEAT_DECL(has_altivec)
109/* has_fpu not implemented yet */
110_PPC_FEAT_DECL(has_hw_ptbl_lkup)
111_PPC_FEAT_DECL(is_bookE)
112_PPC_FEAT_DECL(is_60x)
113_PPC_FEAT_DECL(has_8_bats)
114_PPC_FEAT_DECL(has_epic)
[76a5a3cc]115_PPC_FEAT_DECL(has_shadowed_gprs)
[25a92bc1]116
[2d2de4eb]117#undef _PPC_FEAT_DECL
118
119static inline ppc_cpu_id_t ppc_cpu_current(void)
120{
121        return current_ppc_cpu;
122}
123
[73406bf]124static inline bool ppc_cpu_is_e200(void)
[644448f]125{
[3020614]126        return (ppc_cpu_current() & 0xff80) == 0x8100;
[644448f]127}
128
[39de538]129static inline bool ppc_cpu_is_specific_e200(ppc_cpu_id_t id)
130{
131        return (ppc_cpu_current() & 0xfff0) == id;
132}
133
[73406bf]134static inline bool ppc_cpu_is_e300(void)
[25a92bc1]135{
[2d2de4eb]136        return ppc_cpu_current() == PPC_e300c1
137                || ppc_cpu_current() == PPC_e300c2
138                || ppc_cpu_current() == PPC_e300c3;
139}
140
[73406bf]141static inline bool ppc_cpu_is_e500(void)
[644448f]142{
143        return ppc_cpu_current() == PPC_8540
144                || ppc_cpu_current() == PPC_e500v2;
145}
146
[2d2de4eb]147static inline bool ppc_cpu_is(ppc_cpu_id_t cpu)
148{
149        return ppc_cpu_current() == cpu;
[25a92bc1]150}
[e955b06]151
[f054b51]152#endif /* ASM */
153
[e08dbc5]154#ifdef __cplusplus
155}
156#endif
157
[f054b51]158#endif
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