4.115
Last change
on this file since f9acc33 was
f9acc33,
checked in by Ralf Corsepius <ralf.corsepius@…>, on 02/11/11 at 09:46:53
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2011-02-11 Ralf Corsépius <ralf.corsepius@…>
- e500/mmu/mmu.c, mpc505/ictrl/ictrl.c, mpc505/timer/timer.c,
mpc5xx/ictrl/ictrl.c, mpc5xx/timer/timer.c,
mpc6xx/altivec/vec_sup.c, mpc6xx/clock/c_clock.c,
mpc6xx/mmu/bat.c, mpc6xx/mmu/bat.h, mpc6xx/mmu/pte121.c,
mpc8260/timer/timer.c, mpc8xx/timer/timer.c, new-exceptions/cpu.c,
new-exceptions/bspsupport/ppc_exc_initialize.c,
ppc403/clock/clock.c, ppc403/console/console.c,
ppc403/console/console.c.polled, ppc403/console/console405.c,
ppc403/irq/ictrl.c, ppc403/tty_drv/tty_drv.c,
rtems/powerpc/cache.h, shared/include/powerpc-utility.h, shared/src/cache.c:
Use "asm" instead of "asm" for improved c99-compliance.
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-
Property mode set to
100644
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File size:
1.0 KB
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Line | |
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1 | /* |
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2 | * $Id$ |
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3 | */ |
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4 | |
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5 | #ifndef _RTEMS_POWERPC_CACHE_H |
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6 | #define _RTEMS_POWERPC_CACHE_H |
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7 | |
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8 | #include <rtems/powerpc/powerpc.h> /* for PPC_D_CACHE */ |
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9 | |
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10 | #ifdef _OLD_EXCEPTIONS |
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11 | |
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12 | #if (PPC_D_CACHE != 0) |
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13 | #define _CPU_Data_Cache_Block_Flush( _address ) \ |
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14 | do { register void *__address = (_address); \ |
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15 | register uint32_t _zero = 0; \ |
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16 | __asm__ volatile ( "dcbf %0,%1" : \ |
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17 | "=r" (_zero), "=r" (__address) : \ |
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18 | "0" (_zero), "1" (__address) \ |
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19 | ); \ |
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20 | } while (0) |
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21 | #else |
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22 | #define _CPU_Data_Cache_Block_Flush( _address ) /* nop */ |
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23 | #endif |
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24 | |
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25 | /* |
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26 | * FIXME: This is not used anywhere. |
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27 | */ |
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28 | #if (PPC_D_CACHE != 0) |
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29 | #define _CPU_Data_Cache_Block_Invalidate( _address ) \ |
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30 | do { register void *__address = (_address); \ |
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31 | register uint32_t _zero = 0; \ |
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32 | __asm__ volatile ( "dcbi %0,%1" : \ |
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33 | "=r" (_zero), "=r" (__address) : \ |
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34 | "0" (_zero), "1" (__address) \ |
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35 | ); \ |
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36 | } while (0) |
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37 | #else |
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38 | #define _CPU_Data_Cache_Block_Invalidate( _address ) /* nop */ |
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39 | #endif |
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40 | #endif |
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41 | |
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42 | #endif |
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