source: rtems/c/src/lib/libcpu/powerpc/rtems/powerpc/cache.h @ 3a227b9b

4.104.114.84.95
Last change on this file since 3a227b9b was 3a227b9b, checked in by Ralf Corsepius <ralf.corsepius@…>, on 02/09/05 at 08:01:18

2005-02-09 Ralf Corsepius <ralf.corsepius@…>

  • rtems/powerpc/cache.h, rtems/powerpc/debugmod.h: New header guards.
  • Property mode set to 100644
File size: 994 bytes
Line 
1/*
2 * $Id$
3 */
4
5#ifndef _RTEMS_POWERPC_CACHE_H
6#define _RTEMS_POWERPC_CACHE_H
7
8#include <rtems/score/powerpc.h>
9
10#ifdef _OLD_EXCEPTIONS
11
12#if (PPC_D_CACHE != 0)
13#define _CPU_Data_Cache_Block_Flush( _address ) \
14  do { register void *__address = (_address); \
15       register uint32_t   _zero = 0; \
16       asm volatile ( "dcbf %0,%1" : \
17                      "=r" (_zero), "=r" (__address) : \
18                      "0" (_zero), "1" (__address) \
19       ); \
20  } while (0)
21#else
22#define _CPU_Data_Cache_Block_Flush( _address ) /* nop */
23#endif
24
25/*
26 * FIXME: This is not used anywhere.
27 */
28#if (PPC_D_CACHE != 0)
29#define _CPU_Data_Cache_Block_Invalidate( _address ) \
30  do { register void *__address = (_address); \
31       register uint32_t   _zero = 0; \
32       asm volatile ( "dcbi %0,%1" : \
33                      "=r" (_zero), "=r" (__address) : \
34                      "0" (_zero), "1" (__address) \
35       ); \
36  } while (0)
37#else
38#define _CPU_Data_Cache_Block_Invalidate( _address ) /* nop */
39#endif
40#endif
41
42#endif
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