source: rtems/c/src/lib/libcpu/powerpc/ppc403/vectors/vectors.S @ 11c2382

4.104.114.84.95
Last change on this file since 11c2382 was 11c2382, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 1, 2004 at 10:07:38 AM

2004-04-01 Ralf Corsepius <ralf_corsepius@…>

  • mpc505/vectors/vectors.S: Include <rtems/asm.h> instead of <asm.h>.
  • mpc6xx/exceptions/asm_utils.S: Include <rtems/asm.h> instead of <asm.h>.
  • mpc6xx/mmu/mmuAsm.S: Include <rtems/asm.h> instead of <asm.h>.
  • mpc8260/exceptions/asm_utils.S: Include <rtems/asm.h> instead of <asm.h>.
  • mpc8xx/exceptions/asm_utils.S: Include <rtems/asm.h> instead of <asm.h>.
  • ppc403/vectors/vectors.S: Include <rtems/asm.h> instead of <asm.h>.
  • mpc5xx/exceptions/asm_utils.S: Include <rtems/asm.h> instead of <asm.h>.
  • mpc8260/clock/clock.c: Include <rtems/clockdrv.h> instead of <clockdrv.h>.
  • mpc8xx/clock/clock.c: Include <rtems/clockdrv.h> instead of <clockdrv.h>.
  • ppc403/clock/clock.c: Include <rtems/clockdrv.h> instead of <clockdrv.h>.
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  vectors.s   1.1 - 95/12/04
2 *
3 *  This file contains the assembly code for the PowerPC 403
4 *  interrupt veneers for RTEMS.
5 *
6 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
7 *
8 *  COPYRIGHT (c) 1995 by i-cubed ltd.
9 *
10 *  To anyone who acknowledges that this file is provided "AS IS"
11 *  without any express or implied warranty:
12 *      permission to use, copy, modify, and distribute this file
13 *      for any purpose is hereby granted without fee, provided that
14 *      the above copyright notice and this notice appears in all
15 *      copies, and that the name of i-cubed limited not be used in
16 *      advertising or publicity pertaining to distribution of the
17 *      software without specific, written prior permission.
18 *      i-cubed limited makes no representations about the suitability
19 *      of this software for any purpose.
20 *
21 */
22
23/*
24 *  The issue with this file is getting it loaded at the right place.
25 *  The first vector MUST be at address 0x????0100.
26 *  How this is achieved is dependant on the tool chain.
27 *
28 *  However the basic mechanism for ELF assemblers is to create a
29 *  section called ".vectors", which will be loaded to an address
30 *  between 0x????0000 and 0x????0100 (inclusive) via a link script.
31 *
32 *  The basic mechanism for XCOFF assemblers is to place it in the
33 *  normal text section, and arrange for this file to be located
34 *  at an appropriate position on the linker command line.
35 *
36 *  The variable 'PPC_VECTOR_FILE_BASE' must be defined to be the
37 *  offset from 0x????0000 to the first location in the file.  This
38 *  will usually be 0x0000 or 0x0100.
39 *
40 *  $Id$
41 */
42
43#include <bsp.h> /* PPC_VECTOR_FILE_BASE */
44#include <rtems/asm.h>
45
46#ifndef PPC_VECTOR_FILE_BASE
47#error "PPC_VECTOR_FILE_BASE is not defined."
48#endif
49
50        /* Where this file will be loaded */
51        .set    file_base, PPC_VECTOR_FILE_BASE
52
53        /* Offset to store reg 0 */
54
55        .set    IP_LINK, 0
56#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
57        .set    IP_0, (IP_LINK + 56)
58#else
59        .set    IP_0, (IP_LINK + 8)
60#endif
61        .set    IP_2, (IP_0 + 4)
62
63        .set    IP_3, (IP_2 + 4)
64        .set    IP_4, (IP_3 + 4)
65        .set    IP_5, (IP_4 + 4)
66        .set    IP_6, (IP_5 + 4)
67       
68        .set    IP_7, (IP_6 + 4)
69        .set    IP_8, (IP_7 + 4)
70        .set    IP_9, (IP_8 + 4)
71        .set    IP_10, (IP_9 + 4)
72       
73        .set    IP_11, (IP_10 + 4)
74        .set    IP_12, (IP_11 + 4)
75        .set    IP_13, (IP_12 + 4)
76        .set    IP_28, (IP_13 + 4)
77       
78        .set    IP_29, (IP_28 + 4)
79        .set    IP_30, (IP_29 + 4)
80        .set    IP_31, (IP_30 + 4)
81        .set    IP_CR, (IP_31 + 4)
82       
83        .set    IP_CTR, (IP_CR + 4)
84        .set    IP_XER, (IP_CTR + 4)
85        .set    IP_LR, (IP_XER + 4)
86        .set    IP_PC, (IP_LR + 4)
87       
88        .set    IP_MSR, (IP_PC + 4)
89       
90        .set    IP_END, (IP_MSR + 16)
91
92        /* Vector offsets                        */
93        .set    begin_vector,0x0000
94        .set    crit_vector,0x0100
95        .set    mach_vector,0x0200
96        .set    prot_vector,0x0300
97        .set    ext_vector,0x0500
98        .set    align_vector,0x0600
99        .set    prog_vector,0x0700
100        .set    dec_vector,0x0900
101        .set    sys_vector,0x0C00
102        .set    pit_vector,0x1000
103        .set    fit_vector,0x1010
104        .set    wadt_vector,0x1020
105        .set    debug_vector,0x2000
106
107/* Go to the right section */
108#if PPC_ASM == PPC_ASM_ELF
109        .section .vectors,"awx",@progbits
110#elif PPC_ASM == PPC_ASM_XCOFF
111        .csect  .text[PR]
112#endif
113
114        PUBLIC_VAR (__vectors)
115SYM (__vectors):
116       
117/* Critical error handling */
118        .org    crit_vector - file_base
119#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
120#if (PPC_HAS_FPU)
121        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
122#else
123        stwu    r1, -(20*4 + IP_END)(r1)
124#endif
125#else
126        stwu    r1, -(IP_END)(r1)
127#endif
128        stw     r0, IP_0(r1)
129
130        li      r0, PPC_IRQ_CRIT
131        b       PROC (_ISR_HandlerC)
132       
133/* Machine check exception */
134        .org    mach_vector - file_base
135#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
136#if (PPC_HAS_FPU)
137        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
138#else
139        stwu    r1, -(20*4 + IP_END)(r1)
140#endif
141#else
142        stwu    r1, -(IP_END)(r1)
143#endif
144        stw     r0, IP_0(r1)
145
146        li      r0, PPC_IRQ_MCHECK
147        b       PROC (_ISR_HandlerC)
148       
149/* Protection exception */
150        .org    prot_vector - file_base
151#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
152#if (PPC_HAS_FPU)
153        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
154#else
155        stwu    r1, -(20*4 + IP_END)(r1)
156#endif
157#else
158        stwu    r1, -(IP_END)(r1)
159#endif
160        stw     r0, IP_0(r1)
161
162        li      r0, PPC_IRQ_PROTECT
163        b       PROC (_ISR_Handler)
164
165/* External interrupt */
166        .org    ext_vector - file_base
167#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
168#if (PPC_HAS_FPU)
169        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
170#else
171        stwu    r1, -(20*4 + IP_END)(r1)
172#endif
173#else
174        stwu    r1, -(IP_END)(r1)
175#endif
176        stw     r0, IP_0(r1)
177
178        li      r0, PPC_IRQ_EXTERNAL
179        b       PROC (_ISR_Handler)
180       
181/* Align exception */
182        .org    align_vector - file_base
183        .extern align_h
184        b       align_h
185       
186/* Program exception */
187        .org    prog_vector - file_base
188#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
189#if (PPC_HAS_FPU)
190        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
191#else
192        stwu    r1, -(20*4 + IP_END)(r1)
193#endif
194#else
195        stwu    r1, -(IP_END)(r1)
196#endif
197        stw     r0, IP_0(r1)
198
199        li      r0, PPC_IRQ_PROGRAM
200        b       PROC (_ISR_Handler)
201       
202/* Decrementer exception */
203        .org    dec_vector - file_base
204#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
205#if (PPC_HAS_FPU)
206        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
207#else
208        stwu    r1, -(20*4 + IP_END)(r1)
209#endif
210#else
211        stwu    r1, -(IP_END)(r1)
212#endif
213        stw     r0, IP_0(r1)
214
215        li      r0, PPC_IRQ_PROGRAM
216        b       PROC (_ISR_Handler)
217       
218/* System call */
219        .org    sys_vector - file_base
220#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
221#if (PPC_HAS_FPU)
222        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
223#else
224        stwu    r1, -(20*4 + IP_END)(r1)
225#endif
226#else
227        stwu    r1, -(IP_END)(r1)
228#endif
229        stw     r0, IP_0(r1)
230
231        li      r0, PPC_IRQ_SCALL
232        b       PROC (_ISR_Handler)
233                       
234/* PIT interrupt */
235        .org    pit_vector - file_base
236#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
237#if (PPC_HAS_FPU)
238        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
239#else
240        stwu    r1, -(20*4 + IP_END)(r1)
241#endif
242#else
243        stwu    r1, -(IP_END)(r1)
244#endif
245        stw     r0, IP_0(r1)
246
247        li      r0, PPC_IRQ_PIT
248        b       PROC (_ISR_Handler)
249                       
250/* FIT interrupt */
251        .org    fit_vector - file_base
252#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
253#if (PPC_HAS_FPU)
254        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
255#else
256        stwu    r1, -(20*4 + IP_END)(r1)
257#endif
258#else
259        stwu    r1, -(IP_END)(r1)
260#endif
261        stw     r0, IP_0(r1)
262
263        li      r0, PPC_IRQ_FIT
264        b       PROC (_ISR_Handler)
265                       
266/* Watchdog interrupt */
267        .org    wadt_vector - file_base
268#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
269#if (PPC_HAS_FPU)
270        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
271#else
272        stwu    r1, -(20*4 + IP_END)(r1)
273#endif
274#else
275        stwu    r1, -(IP_END)(r1)
276#endif
277        stw     r0, IP_0(r1)
278
279        li      r0, PPC_IRQ_WATCHDOG
280        b       PROC (_ISR_HandlerC)
281       
282/* Debug exception */
283debug:
284#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
285#if (PPC_HAS_FPU)
286        stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
287#else
288        stwu    r1, -(20*4 + IP_END)(r1)
289#endif
290#else
291        stwu    r1, -(IP_END)(r1)
292#endif
293        stw     r0, IP_0(r1)
294
295        li      r0, PPC_IRQ_DEBUG
296        b       PROC (_ISR_HandlerC)
297
298/* Debug exception */
299        .org    debug_vector - file_base
300        b       debug
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