1 | /* |
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2 | * This file contains the PowerPC 405GP tty driver. |
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3 | * |
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4 | * Derived from /c/src/lib/libbsp/i386/shared/comm/tty_drv.c |
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5 | * |
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6 | * Modifications to PPC405GP by Dennis Ehlin |
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7 | * |
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8 | */ |
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9 | |
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10 | #define NO_BSP_INIT |
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11 | |
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12 | #include <stdio.h> |
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13 | #include <rtems/termiostypes.h> |
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14 | #include <termios.h> |
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15 | #include <assert.h> |
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16 | #include <rtems.h> |
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17 | #include <rtems/libio.h> |
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18 | #include "../ictrl/ictrl.h" |
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19 | #include <stdlib.h> /* for atexit() */ |
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20 | |
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21 | |
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22 | struct ttyasync { |
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23 | /*---------------------------------------------------------------------------+ |
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24 | | Data Register. |
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25 | +---------------------------------------------------------------------------*/ |
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26 | unsigned char RBR; /* 0x00 */ |
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27 | #define THR RBR |
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28 | /*---------------------------------------------------------------------------+ |
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29 | | Interrupt registers |
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30 | +---------------------------------------------------------------------------*/ |
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31 | unsigned char IER; /* Interrupt Enable Register 0x01 */ |
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32 | #define IER_RCV 0x01 |
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33 | #define IER_XMT 0x02 |
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34 | #define IER_LS 0x04 |
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35 | #define IER_MS 0x08 |
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36 | |
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37 | unsigned char ISR; /* Interrupt Status Register 0x02 */ |
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38 | #define ISR_MS 0x00 |
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39 | #define ISR_nIP 0x01 |
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40 | #define ISR_Tx 0x02 |
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41 | #define ISR_Rx 0x04 |
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42 | #define ISR_LS 0x06 |
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43 | #define ISR_RxTO 0x0C |
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44 | #define ISR_64BFIFO 0x20 |
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45 | #define ISR_FIFOworks 0x40 |
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46 | #define ISR_FIFOen 0x80 |
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47 | |
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48 | /*---------------------------------------------------------------------------+ |
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49 | | FIFO Control registers |
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50 | +---------------------------------------------------------------------------*/ |
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51 | #define FCR ISR |
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52 | #define FCR_FE 0x01 /* FIFO enable */ |
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53 | #define FCR_CRF 0x02 /* Clear receive FIFO */ |
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54 | #define FCR_CTF 0x04 /* Clear transmit FIFO */ |
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55 | #define FCR_DMA 0x08 /* DMA mode select */ |
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56 | #define FCR_F64 0x20 /* Enable 64 byte fifo (16750+) */ |
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57 | #define FCR_RT14 0xC0 /* Set Rx trigger at 14 */ |
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58 | #define FCR_RT8 0x80 /* Set Rx trigger at 8 */ |
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59 | #define FCR_RT4 0x40 /* Set Rx trigger at 4 */ |
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60 | #define FCR_RT1 0x00 /* Set Rx trigger at 1 */ |
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61 | |
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62 | /*---------------------------------------------------------------------------+ |
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63 | | Baud rate divisor registers |
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64 | +---------------------------------------------------------------------------*/ |
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65 | #define DLL RBR |
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66 | #define DLM IER |
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67 | |
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68 | /*---------------------------------------------------------------------------+ |
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69 | | Alternate function registers |
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70 | +---------------------------------------------------------------------------*/ |
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71 | #define AFR ISR |
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72 | |
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73 | /*---------------------------------------------------------------------------+ |
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74 | | Line control Register. |
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75 | +---------------------------------------------------------------------------*/ |
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76 | unsigned char LCR; /* 0x03 */ |
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77 | #define LCR_WL5 0x00 /* Word length 5 */ |
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78 | #define LCR_WL6 0x01 /* Word length 6 */ |
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79 | #define LCR_WL7 0x02 /* Word length 7 */ |
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80 | #define LCR_WL8 0x03 /* Word length 8 */ |
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81 | |
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82 | #define LCR_SB1 0x00 /* 1 stop bits */ |
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83 | #define LCR_SB1_5 0x04 /* 1.5 stop bits , only valid with 5 bit words*/ |
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84 | #define LCR_SB1_5 0x04 /* 2 stop bits */ |
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85 | |
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86 | #define LCR_PN 0x00 /* Parity NONE */ |
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87 | #define LCR_PE 0x0C /* Parity EVEN */ |
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88 | #define LCR_PO 0x08 /* Parity ODD */ |
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89 | #define LCR_PM 0x28 /* Forced "mark" parity */ |
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90 | #define LCR_PS 0x38 /* Forced "space" parity */ |
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91 | |
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92 | #define LCR_DL 0x80 /* Enable baudrate latch */ |
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93 | |
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94 | /*---------------------------------------------------------------------------+ |
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95 | | Modem control Register. |
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96 | +---------------------------------------------------------------------------*/ |
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97 | unsigned char MCR; /* 0x04 */ |
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98 | #define MCR_DTR 0x01 |
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99 | #define MCR_RTS 0x02 |
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100 | #define MCR_INT 0x08 /* Enable interrupts */ |
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101 | #define MCR_LOOP 0x10 /* Loopback mode */ |
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102 | |
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103 | /*---------------------------------------------------------------------------+ |
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104 | | Line status Register. |
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105 | +---------------------------------------------------------------------------*/ |
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106 | unsigned char LSR; /* 0x05 */ |
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107 | #define LSR_RSR 0x01 |
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108 | #define LSR_OE 0x02 |
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109 | #define LSR_PE 0x04 |
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110 | #define LSR_FE 0x08 |
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111 | #define LSR_BI 0x10 |
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112 | #define LSR_THE 0x20 |
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113 | #define LSR_TEMT 0x40 |
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114 | #define LSR_FIE 0x80 |
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115 | |
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116 | /*---------------------------------------------------------------------------+ |
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117 | | Modem status Register. |
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118 | +---------------------------------------------------------------------------*/ |
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119 | unsigned char MSR; /* 0x06 */ |
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120 | #define MSR_DCTS 0x01 |
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121 | #define MSR_DDSR 0x02 |
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122 | #define MSR_TERI 0x04 |
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123 | #define MSR_DDCD 0x08 |
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124 | #define MSR_CTS 0x10 |
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125 | #define MSR_DSR 0x20 |
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126 | #define MSR_RI 0x40 |
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127 | #define MSR_CD 0x80 |
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128 | |
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129 | /*---------------------------------------------------------------------------+ |
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130 | | Scratch pad Register. |
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131 | +---------------------------------------------------------------------------*/ |
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132 | unsigned char SCR; /* 0x07 */ |
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133 | }; |
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134 | |
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135 | |
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136 | #define TTY0_USE_UART 1 /* 0=UART0 1=UART1 */ |
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137 | #define TTY0_UART_INTERNAL_CLOCK_DIVISOR 16 |
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138 | #define TTY0_USE_INTERRUPT |
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139 | |
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140 | |
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141 | typedef volatile struct ttyasync *tty0pasync; |
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142 | static const tty0pasync tty0port = (tty0pasync)(0xEF600300 + (TTY0_USE_UART*0x100)); /* 0xEF600300 - port A, 0xEF600400 - port B */ |
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143 | |
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144 | static void *tty0ttyp; /* handle for termios */ |
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145 | |
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146 | |
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147 | int tty0_round(double x) |
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148 | { |
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149 | return (int)((int)((x-(int)x)*1000)>500 ? x+1 : x); |
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150 | } |
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151 | |
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152 | void |
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153 | tty0BaudSet(uint32_t baudrate) |
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154 | { |
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155 | uint32_t tmp; |
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156 | |
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157 | tmp = tty0_round( (double)rtems_cpu_configuration_get_serial_per_sec() / (baudrate * 16) ); |
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158 | |
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159 | tty0port->LCR = tty0port->LCR | LCR_DL; |
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160 | |
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161 | tty0port->DLL = tmp & 0xff; |
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162 | tty0port->DLM = tmp >> 8; |
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163 | |
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164 | tty0port->LCR = tty0port->LCR & ~LCR_DL; |
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165 | } |
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166 | /* |
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167 | * Hardware-dependent portion of tcsetattr(). |
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168 | */ |
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169 | static int |
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170 | tty0SetAttributes (int minor, const struct termios *t) |
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171 | { |
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172 | int baud; |
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173 | |
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174 | /* FIXME: check c_cflag & CRTSCTS for hardware flowcontrol */ |
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175 | /* FIXME: check and IMPLEMENT XON/XOFF */ |
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176 | switch (t->c_cflag & CBAUD) { |
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177 | default: baud = -1; break; |
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178 | case B50: baud = 50; break; |
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179 | case B75: baud = 75; break; |
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180 | case B110: baud = 110; break; |
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181 | case B134: baud = 134; break; |
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182 | case B150: baud = 150; break; |
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183 | case B200: baud = 200; break; |
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184 | case B300: baud = 300; break; |
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185 | case B600: baud = 600; break; |
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186 | case B1200: baud = 1200; break; |
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187 | case B1800: baud = 1800; break; |
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188 | case B2400: baud = 2400; break; |
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189 | case B4800: baud = 4800; break; |
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190 | case B9600: baud = 9600; break; |
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191 | case B19200: baud = 19200; break; |
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192 | case B38400: baud = 38400; break; |
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193 | case B57600: baud = 57600; break; |
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194 | case B115200: baud = 115200; break; |
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195 | case B230400: baud = 230400; break; |
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196 | case B460800: baud = 460800; break; |
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197 | } |
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198 | if (baud > 0) { |
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199 | tty0BaudSet(baud); |
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200 | } |
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201 | return 0; |
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202 | } |
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203 | |
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204 | static int |
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205 | tty0PollRead (int minor) |
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206 | { |
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207 | |
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208 | /* Wait for character */ |
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209 | while ((tty0port->LSR & LSR_RSR)==0);; |
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210 | |
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211 | return tty0port->RBR; |
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212 | } |
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213 | |
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214 | |
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215 | static int |
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216 | tty0PollWrite(int minor,const char *buf,int len) |
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217 | { |
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218 | |
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219 | while (len-- > 0) { |
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220 | while (!(tty0port->LSR & LSR_THE));; |
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221 | tty0port->THR = *buf++; |
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222 | } |
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223 | return 0; |
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224 | } |
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225 | |
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226 | /* ================ Termios support =================*/ |
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227 | |
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228 | static int tty0InterruptWrite (int minor, const char *buf, int len) |
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229 | { |
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230 | |
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231 | if(len <= 0) |
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232 | { |
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233 | return 0; |
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234 | } |
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235 | |
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236 | /* Write character */ |
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237 | |
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238 | tty0port->THR = (*buf &0xff); |
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239 | tty0port->IER |= IER_XMT; /* always enable tx interrupt */ |
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240 | |
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241 | return 0; |
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242 | |
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243 | } |
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244 | |
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245 | static rtems_isr tty0serial_ISR(rtems_vector_number v) |
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246 | { |
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247 | char buf[128]; |
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248 | int off, ret, vect; |
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249 | |
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250 | off = 0; |
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251 | |
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252 | for(;;) |
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253 | { |
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254 | vect = tty0port->ISR & 0x0f; |
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255 | if(vect & 1) |
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256 | { |
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257 | /* no more interrupts */ |
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258 | if(off > 0) { |
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259 | /* Update rx buffer */ |
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260 | rtems_termios_enqueue_raw_characters(tty0ttyp, buf, off ); |
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261 | |
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262 | tty0port->IER |= IER_RCV; /* always enable rx interrupt */ |
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263 | /*rtems_termios_rxirq_occured(tty0ttyp);*/ |
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264 | } |
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265 | return; |
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266 | } |
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267 | |
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268 | vect = vect & 0xe; /*mask out all except interrupt pending*/ |
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269 | |
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270 | switch(vect) |
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271 | { |
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272 | |
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273 | case ISR_Tx : |
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274 | /* |
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275 | * TX holding empty: we have to disable these interrupts |
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276 | * if there is nothing more to send. |
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277 | */ |
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278 | |
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279 | /* If nothing else to send disable interrupts */ |
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280 | ret = rtems_termios_dequeue_characters(tty0ttyp, 1); |
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281 | |
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282 | if ( ret == 0 ) { |
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283 | tty0port->IER &= ~IER_XMT; |
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284 | } |
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285 | |
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286 | break; |
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287 | case ISR_RxTO: |
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288 | case ISR_Rx : |
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289 | |
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290 | /* disable interrupts and notify termios */ |
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291 | tty0port->IER &= ~IER_RCV; |
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292 | |
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293 | /* read all bytes in fifo*/ |
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294 | while (( off < sizeof(buf) ) && ( tty0port->LSR & LSR_RSR )) |
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295 | { |
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296 | buf[off++] = tty0port->RBR; |
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297 | } |
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298 | |
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299 | break; |
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300 | case ISR_LS: |
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301 | /* RX error: eat character */ |
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302 | /* printk("********* Error **********\n"); */ |
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303 | break; |
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304 | default: |
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305 | /* Should not happen */ |
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306 | /* printk("error vect=%x",vect); */ |
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307 | return; |
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308 | } |
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309 | } |
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310 | |
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311 | } |
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312 | |
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313 | |
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314 | /* |
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315 | * |
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316 | * deinit TTY0 |
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317 | * |
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318 | */ |
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319 | void |
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320 | tty0DeInit(void) |
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321 | { |
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322 | /* |
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323 | * disable interrupts for serial tty0port |
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324 | * set it to state to work with polling boot monitor, if any... |
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325 | */ |
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326 | |
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327 | /* set up baud rate to original state */ |
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328 | tty0BaudSet(rtems_cpu_configuration_get_serial_rate()); |
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329 | |
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330 | tty0port->IER = 0; |
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331 | |
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332 | } |
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333 | |
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334 | /* |
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335 | * |
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336 | * init SPI |
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337 | * |
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338 | */ |
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339 | rtems_status_code |
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340 | tty0Initialize(void) |
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341 | { |
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342 | register unsigned tmp; |
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343 | rtems_isr_entry previous_isr; /* this is a dummy */ |
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344 | unsigned char _ier; |
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345 | unsigned char _tmp; |
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346 | |
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347 | /* |
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348 | * Initialise the serial tty0port |
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349 | */ |
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350 | |
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351 | /* |
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352 | * Select clock source and set uart internal clock divisor |
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353 | */ |
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354 | |
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355 | asm volatile ("mfdcr %0, 0x0b1" : "=r" (tmp)); /* CPC_CR0 0x0b1 */ |
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356 | |
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357 | /* UART0 bit 24 0x80, UART1 bit 25 0x40 */ |
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358 | tmp |= (rtems_cpu_configuration_get_serial_external_clock() ? (TTY0_USE_UART ? 0x40 : 0x80) : 0); |
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359 | |
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360 | tmp |= (rtems_cpu_configuration_get_serial_external_clock() ? 0: ((TTY0_UART_INTERNAL_CLOCK_DIVISOR -1) << 1)); |
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361 | |
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362 | asm volatile ("mtdcr 0x0b1, %0" : "=r" (tmp) : "0" (tmp)); /* CPC_CR0 0x0b1*/ |
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363 | |
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364 | /* Disable tty0port interrupts while changing hardware */ |
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365 | _ier = tty0port->IER; |
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366 | tty0port->IER = 0; |
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367 | |
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368 | /* set up tty0port control: 8 bit,1 stop,no parity */ |
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369 | tty0port->LCR = LCR_WL8 | LCR_SB1 | LCR_PN; |
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370 | |
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371 | /* set up baud rate */ |
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372 | tty0BaudSet(rtems_cpu_configuration_get_serial_rate()); |
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373 | |
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374 | |
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375 | #ifdef TTY0_USE_INTERRUPT |
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376 | |
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377 | /* add rx/tx isr to vector table */ |
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378 | |
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379 | if (TTY0_USE_UART==0) |
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380 | ictrl_set_vector(tty0serial_ISR,PPC_IRQ_EXT_UART0,&previous_isr); |
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381 | else |
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382 | ictrl_set_vector(tty0serial_ISR,PPC_IRQ_EXT_UART1,&previous_isr); |
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383 | |
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384 | /* Enable and clear FIFO */ |
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385 | tty0port->FCR = FCR_FE | FCR_CRF | FCR_CTF | FCR_RT14; |
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386 | |
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387 | /* Read status to clear them */ |
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388 | _tmp = tty0port->LSR; |
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389 | _tmp = tty0port->RBR; |
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390 | _tmp = tty0port->MSR; |
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391 | |
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392 | /* Enable recive interrupts, don't enable TxInt yet */ |
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393 | tty0port->IER=IER_RCV; |
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394 | |
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395 | #else |
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396 | |
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397 | tty0port->IER=_ier; |
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398 | |
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399 | #endif |
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400 | |
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401 | atexit(tty0DeInit); |
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402 | |
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403 | return RTEMS_SUCCESSFUL; |
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404 | } |
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405 | |
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406 | /* |
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407 | *************** |
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408 | * BOILERPLATE * |
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409 | *************** |
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410 | */ |
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411 | |
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412 | /* console_initialize |
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413 | * |
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414 | * This routine initializes the console IO driver. |
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415 | * |
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416 | * Input parameters: NONE |
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417 | * |
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418 | * Output parameters: NONE |
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419 | * |
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420 | * Return values: |
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421 | */ |
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422 | |
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423 | rtems_device_driver tty0_initialize( |
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424 | rtems_device_major_number major, |
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425 | rtems_device_minor_number minor, |
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426 | void *arg |
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427 | ) |
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428 | { |
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429 | rtems_status_code status; |
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430 | |
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431 | |
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432 | /* |
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433 | * Set up TERMIOS |
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434 | */ |
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435 | rtems_termios_initialize (); |
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436 | |
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437 | /* |
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438 | * Do device-specific initialization |
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439 | */ |
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440 | |
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441 | /*tty0Initialize (); Moved this to open instead */ |
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442 | |
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443 | /* |
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444 | * Register the device |
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445 | */ |
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446 | status = rtems_io_register_name ("/dev/ttyS0", major, 0); |
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447 | if (status != RTEMS_SUCCESSFUL) |
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448 | rtems_fatal_error_occurred (status); |
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449 | return RTEMS_SUCCESSFUL; |
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450 | } |
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451 | |
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452 | |
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453 | /* |
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454 | * Open entry point |
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455 | */ |
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456 | |
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457 | rtems_device_driver tty0_open( |
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458 | rtems_device_major_number major, |
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459 | rtems_device_minor_number minor, |
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460 | void * arg |
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461 | ) |
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462 | { |
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463 | rtems_status_code sc; |
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464 | |
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465 | #ifdef TTY0_USE_INTERRUPT |
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466 | |
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467 | static const rtems_termios_callbacks intrCallbacks = { |
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468 | NULL, /* firstOpen */ |
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469 | NULL, /* lastClose */ |
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470 | NULL, /* pollRead */ |
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471 | tty0InterruptWrite, /* write */ |
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472 | tty0SetAttributes, /* setAttributes */ |
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473 | NULL, /* stopRemoteTx */ |
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474 | NULL, /* startRemoteTx */ |
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475 | TERMIOS_TASK_DRIVEN /* outputUsesInterrupts */ |
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476 | }; |
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477 | rtems_libio_open_close_args_t *args = arg; |
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478 | |
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479 | tty0Initialize (); /* Initalize hardware */ |
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480 | |
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481 | sc = rtems_termios_open (major, minor, arg, &intrCallbacks); |
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482 | tty0ttyp = args->iop->data1; |
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483 | |
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484 | #else |
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485 | |
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486 | static const rtems_termios_callbacks pollCallbacks = { |
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487 | NULL, /* firstOpen */ |
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488 | NULL, /* lastClose */ |
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489 | tty0PollRead, /* pollRead */ |
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490 | tty0PollWrite, /* write */ |
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491 | tty0SetAttributes, /* setAttributes */ |
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492 | NULL, /* stopRemoteTx */ |
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493 | NULL, /* startRemoteTx */ |
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494 | 0 /* outputUsesInterrupts */ |
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495 | }; |
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496 | |
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497 | tty0Initialize (); /* Initalize hardware */ |
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498 | |
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499 | sc = rtems_termios_open (major, minor, arg, &pollCallbacks); |
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500 | |
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501 | #endif |
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502 | |
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503 | return sc; |
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504 | } |
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505 | |
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506 | /* |
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507 | * Close entry point |
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508 | */ |
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509 | |
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510 | rtems_device_driver tty0_close( |
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511 | rtems_device_major_number major, |
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512 | rtems_device_minor_number minor, |
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513 | void * arg |
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514 | ) |
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515 | { |
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516 | return rtems_termios_close (arg); |
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517 | } |
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518 | |
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519 | /* |
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520 | * read bytes from the serial port. We only have stdin. |
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521 | */ |
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522 | |
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523 | rtems_device_driver tty0_read( |
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524 | rtems_device_major_number major, |
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525 | rtems_device_minor_number minor, |
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526 | void * arg |
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527 | ) |
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528 | { |
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529 | return rtems_termios_read (arg); |
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530 | } |
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531 | |
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532 | /* |
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533 | * write bytes to the serial port. Stdout and stderr are the same. |
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534 | */ |
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535 | |
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536 | rtems_device_driver tty0_write( |
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537 | rtems_device_major_number major, |
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538 | rtems_device_minor_number minor, |
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539 | void * arg |
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540 | ) |
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541 | { |
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542 | return rtems_termios_write (arg); |
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543 | } |
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544 | |
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545 | /* |
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546 | * IO Control entry point |
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547 | */ |
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548 | |
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549 | rtems_device_driver tty0_control( |
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550 | rtems_device_major_number major, |
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551 | rtems_device_minor_number minor, |
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552 | void * arg |
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553 | ) |
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554 | { |
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555 | return rtems_termios_ioctl (arg); |
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556 | } |
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