[e9ae97fb] | 1 | /* |
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| 2 | * This file contains the PowerPC 405GP tty driver. |
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| 3 | * |
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| 4 | * Derived from /c/src/lib/libbsp/i386/shared/comm/tty_drv.c |
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| 5 | * |
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[359e537] | 6 | * Modifications to PPC405GP by Dennis Ehlin |
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[e9ae97fb] | 7 | * |
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| 8 | */ |
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| 9 | |
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| 10 | #define NO_BSP_INIT |
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| 11 | |
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| 12 | #include <stdio.h> |
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| 13 | #include <rtems/termiostypes.h> |
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| 14 | #include <termios.h> |
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| 15 | #include <assert.h> |
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| 16 | #include <rtems.h> |
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| 17 | #include <rtems/libio.h> |
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[7f5ecbc2] | 18 | #include "../irq/ictrl.h" |
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[e9ae97fb] | 19 | #include <stdlib.h> /* for atexit() */ |
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| 20 | |
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[c4cc8199] | 21 | extern uint32_t bsp_serial_per_sec; |
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[39d08d55] | 22 | extern bool bsp_serial_external_clock; |
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| 23 | extern bool bsp_serial_cts_rts; |
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| 24 | extern bool bsp_serial_xon_xoff; |
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[c4cc8199] | 25 | extern uint32_t bsp_serial_rate; |
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[e9ae97fb] | 26 | |
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| 27 | struct ttyasync { |
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| 28 | /*---------------------------------------------------------------------------+ |
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| 29 | | Data Register. |
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| 30 | +---------------------------------------------------------------------------*/ |
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| 31 | unsigned char RBR; /* 0x00 */ |
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| 32 | #define THR RBR |
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| 33 | /*---------------------------------------------------------------------------+ |
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| 34 | | Interrupt registers |
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| 35 | +---------------------------------------------------------------------------*/ |
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| 36 | unsigned char IER; /* Interrupt Enable Register 0x01 */ |
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| 37 | #define IER_RCV 0x01 |
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| 38 | #define IER_XMT 0x02 |
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| 39 | #define IER_LS 0x04 |
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| 40 | #define IER_MS 0x08 |
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| 41 | |
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| 42 | unsigned char ISR; /* Interrupt Status Register 0x02 */ |
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| 43 | #define ISR_MS 0x00 |
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| 44 | #define ISR_nIP 0x01 |
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| 45 | #define ISR_Tx 0x02 |
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| 46 | #define ISR_Rx 0x04 |
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| 47 | #define ISR_LS 0x06 |
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| 48 | #define ISR_RxTO 0x0C |
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| 49 | #define ISR_64BFIFO 0x20 |
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| 50 | #define ISR_FIFOworks 0x40 |
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| 51 | #define ISR_FIFOen 0x80 |
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| 52 | |
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| 53 | /*---------------------------------------------------------------------------+ |
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| 54 | | FIFO Control registers |
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| 55 | +---------------------------------------------------------------------------*/ |
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| 56 | #define FCR ISR |
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| 57 | #define FCR_FE 0x01 /* FIFO enable */ |
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| 58 | #define FCR_CRF 0x02 /* Clear receive FIFO */ |
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| 59 | #define FCR_CTF 0x04 /* Clear transmit FIFO */ |
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| 60 | #define FCR_DMA 0x08 /* DMA mode select */ |
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| 61 | #define FCR_F64 0x20 /* Enable 64 byte fifo (16750+) */ |
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| 62 | #define FCR_RT14 0xC0 /* Set Rx trigger at 14 */ |
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| 63 | #define FCR_RT8 0x80 /* Set Rx trigger at 8 */ |
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| 64 | #define FCR_RT4 0x40 /* Set Rx trigger at 4 */ |
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| 65 | #define FCR_RT1 0x00 /* Set Rx trigger at 1 */ |
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| 66 | |
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| 67 | /*---------------------------------------------------------------------------+ |
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| 68 | | Baud rate divisor registers |
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| 69 | +---------------------------------------------------------------------------*/ |
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| 70 | #define DLL RBR |
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| 71 | #define DLM IER |
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| 72 | |
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| 73 | /*---------------------------------------------------------------------------+ |
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| 74 | | Alternate function registers |
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| 75 | +---------------------------------------------------------------------------*/ |
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[359e537] | 76 | #define AFR ISR |
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[e9ae97fb] | 77 | |
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| 78 | /*---------------------------------------------------------------------------+ |
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| 79 | | Line control Register. |
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| 80 | +---------------------------------------------------------------------------*/ |
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| 81 | unsigned char LCR; /* 0x03 */ |
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| 82 | #define LCR_WL5 0x00 /* Word length 5 */ |
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| 83 | #define LCR_WL6 0x01 /* Word length 6 */ |
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| 84 | #define LCR_WL7 0x02 /* Word length 7 */ |
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| 85 | #define LCR_WL8 0x03 /* Word length 8 */ |
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| 86 | |
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| 87 | #define LCR_SB1 0x00 /* 1 stop bits */ |
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| 88 | #define LCR_SB1_5 0x04 /* 1.5 stop bits , only valid with 5 bit words*/ |
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| 89 | #define LCR_SB1_5 0x04 /* 2 stop bits */ |
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| 90 | |
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| 91 | #define LCR_PN 0x00 /* Parity NONE */ |
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| 92 | #define LCR_PE 0x0C /* Parity EVEN */ |
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| 93 | #define LCR_PO 0x08 /* Parity ODD */ |
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| 94 | #define LCR_PM 0x28 /* Forced "mark" parity */ |
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| 95 | #define LCR_PS 0x38 /* Forced "space" parity */ |
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| 96 | |
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| 97 | #define LCR_DL 0x80 /* Enable baudrate latch */ |
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| 98 | |
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| 99 | /*---------------------------------------------------------------------------+ |
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| 100 | | Modem control Register. |
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| 101 | +---------------------------------------------------------------------------*/ |
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| 102 | unsigned char MCR; /* 0x04 */ |
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| 103 | #define MCR_DTR 0x01 |
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| 104 | #define MCR_RTS 0x02 |
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| 105 | #define MCR_INT 0x08 /* Enable interrupts */ |
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| 106 | #define MCR_LOOP 0x10 /* Loopback mode */ |
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| 107 | |
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| 108 | /*---------------------------------------------------------------------------+ |
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| 109 | | Line status Register. |
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| 110 | +---------------------------------------------------------------------------*/ |
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| 111 | unsigned char LSR; /* 0x05 */ |
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| 112 | #define LSR_RSR 0x01 |
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| 113 | #define LSR_OE 0x02 |
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| 114 | #define LSR_PE 0x04 |
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| 115 | #define LSR_FE 0x08 |
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| 116 | #define LSR_BI 0x10 |
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| 117 | #define LSR_THE 0x20 |
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| 118 | #define LSR_TEMT 0x40 |
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| 119 | #define LSR_FIE 0x80 |
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| 120 | |
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| 121 | /*---------------------------------------------------------------------------+ |
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| 122 | | Modem status Register. |
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| 123 | +---------------------------------------------------------------------------*/ |
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| 124 | unsigned char MSR; /* 0x06 */ |
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[73cdeb6] | 125 | #define UART_MSR_DCTS 0x01 |
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| 126 | #define UART_MSR_DDSR 0x02 |
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| 127 | #define UART_MSR_TERI 0x04 |
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| 128 | #define UART_MSR_DDCD 0x08 |
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| 129 | #define UART_MSR_CTS 0x10 |
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| 130 | #define UART_MSR_DSR 0x20 |
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| 131 | #define UART_MSR_RI 0x40 |
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| 132 | #define UART_MSR_CD 0x80 |
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[e9ae97fb] | 133 | |
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| 134 | /*---------------------------------------------------------------------------+ |
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| 135 | | Scratch pad Register. |
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| 136 | +---------------------------------------------------------------------------*/ |
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| 137 | unsigned char SCR; /* 0x07 */ |
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| 138 | }; |
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| 139 | |
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| 140 | |
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| 141 | #define TTY0_USE_UART 1 /* 0=UART0 1=UART1 */ |
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| 142 | #define TTY0_UART_INTERNAL_CLOCK_DIVISOR 16 |
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| 143 | #define TTY0_USE_INTERRUPT |
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| 144 | |
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| 145 | |
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| 146 | typedef volatile struct ttyasync *tty0pasync; |
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| 147 | static const tty0pasync tty0port = (tty0pasync)(0xEF600300 + (TTY0_USE_UART*0x100)); /* 0xEF600300 - port A, 0xEF600400 - port B */ |
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| 148 | |
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| 149 | static void *tty0ttyp; /* handle for termios */ |
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| 150 | |
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| 151 | |
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| 152 | int tty0_round(double x) |
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| 153 | { |
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| 154 | return (int)((int)((x-(int)x)*1000)>500 ? x+1 : x); |
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| 155 | } |
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| 156 | |
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[359e537] | 157 | void |
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[66c373bf] | 158 | tty0BaudSet(uint32_t baudrate) |
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[e9ae97fb] | 159 | { |
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[66c373bf] | 160 | uint32_t tmp; |
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[e9ae97fb] | 161 | |
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[c4cc8199] | 162 | tmp = tty0_round( (double)bsp_serial_per_sec / (baudrate * 16) ); |
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[e9ae97fb] | 163 | |
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| 164 | tty0port->LCR = tty0port->LCR | LCR_DL; |
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| 165 | |
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| 166 | tty0port->DLL = tmp & 0xff; |
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| 167 | tty0port->DLM = tmp >> 8; |
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| 168 | |
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| 169 | tty0port->LCR = tty0port->LCR & ~LCR_DL; |
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| 170 | } |
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| 171 | /* |
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| 172 | * Hardware-dependent portion of tcsetattr(). |
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| 173 | */ |
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| 174 | static int |
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| 175 | tty0SetAttributes (int minor, const struct termios *t) |
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| 176 | { |
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| 177 | int baud; |
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| 178 | |
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| 179 | /* FIXME: check c_cflag & CRTSCTS for hardware flowcontrol */ |
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| 180 | /* FIXME: check and IMPLEMENT XON/XOFF */ |
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| 181 | switch (t->c_cflag & CBAUD) { |
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| 182 | default: baud = -1; break; |
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| 183 | case B50: baud = 50; break; |
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| 184 | case B75: baud = 75; break; |
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| 185 | case B110: baud = 110; break; |
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| 186 | case B134: baud = 134; break; |
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| 187 | case B150: baud = 150; break; |
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| 188 | case B200: baud = 200; break; |
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| 189 | case B300: baud = 300; break; |
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| 190 | case B600: baud = 600; break; |
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| 191 | case B1200: baud = 1200; break; |
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| 192 | case B1800: baud = 1800; break; |
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| 193 | case B2400: baud = 2400; break; |
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| 194 | case B4800: baud = 4800; break; |
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| 195 | case B9600: baud = 9600; break; |
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| 196 | case B19200: baud = 19200; break; |
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| 197 | case B38400: baud = 38400; break; |
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| 198 | case B57600: baud = 57600; break; |
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| 199 | case B115200: baud = 115200; break; |
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| 200 | case B230400: baud = 230400; break; |
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| 201 | case B460800: baud = 460800; break; |
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| 202 | } |
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| 203 | if (baud > 0) { |
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| 204 | tty0BaudSet(baud); |
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| 205 | } |
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| 206 | return 0; |
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| 207 | } |
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| 208 | |
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[92049ab] | 209 | #ifndef TTY0_USE_INTERRUPT |
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[e9ae97fb] | 210 | static int |
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| 211 | tty0PollRead (int minor) |
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| 212 | { |
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| 213 | |
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| 214 | /* Wait for character */ |
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| 215 | while ((tty0port->LSR & LSR_RSR)==0);; |
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| 216 | |
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[359e537] | 217 | return tty0port->RBR; |
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[e9ae97fb] | 218 | } |
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| 219 | |
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| 220 | |
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[fbd06a09] | 221 | static ssize_t |
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| 222 | tty0PollWrite(int minor, const char *buf, size_t len) |
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[359e537] | 223 | { |
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[e9ae97fb] | 224 | |
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| 225 | while (len-- > 0) { |
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| 226 | while (!(tty0port->LSR & LSR_THE));; |
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| 227 | tty0port->THR = *buf++; |
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| 228 | } |
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| 229 | return 0; |
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| 230 | } |
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[92049ab] | 231 | #endif |
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[e9ae97fb] | 232 | |
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| 233 | /* ================ Termios support =================*/ |
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[359e537] | 234 | |
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[fbd06a09] | 235 | static ssize_t tty0InterruptWrite (int minor, const char *buf, size_t len) |
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[e9ae97fb] | 236 | { |
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| 237 | |
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| 238 | if(len <= 0) |
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| 239 | { |
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| 240 | return 0; |
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| 241 | } |
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[359e537] | 242 | |
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[e9ae97fb] | 243 | /* Write character */ |
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[359e537] | 244 | |
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[e9ae97fb] | 245 | tty0port->THR = (*buf &0xff); |
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| 246 | tty0port->IER |= IER_XMT; /* always enable tx interrupt */ |
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| 247 | |
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| 248 | return 0; |
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| 249 | |
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| 250 | } |
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| 251 | |
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| 252 | static rtems_isr tty0serial_ISR(rtems_vector_number v) |
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| 253 | { |
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| 254 | char buf[128]; |
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| 255 | int off, ret, vect; |
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| 256 | |
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| 257 | off = 0; |
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| 258 | |
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| 259 | for(;;) |
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| 260 | { |
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| 261 | vect = tty0port->ISR & 0x0f; |
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[359e537] | 262 | if(vect & 1) |
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[e9ae97fb] | 263 | { |
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| 264 | /* no more interrupts */ |
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| 265 | if(off > 0) { |
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| 266 | /* Update rx buffer */ |
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| 267 | rtems_termios_enqueue_raw_characters(tty0ttyp, buf, off ); |
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| 268 | |
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| 269 | tty0port->IER |= IER_RCV; /* always enable rx interrupt */ |
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| 270 | /*rtems_termios_rxirq_occured(tty0ttyp);*/ |
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| 271 | } |
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| 272 | return; |
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| 273 | } |
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| 274 | |
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| 275 | vect = vect & 0xe; /*mask out all except interrupt pending*/ |
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[359e537] | 276 | |
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[e9ae97fb] | 277 | switch(vect) |
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| 278 | { |
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| 279 | |
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| 280 | case ISR_Tx : |
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[359e537] | 281 | /* |
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| 282 | * TX holding empty: we have to disable these interrupts |
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| 283 | * if there is nothing more to send. |
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[e9ae97fb] | 284 | */ |
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| 285 | |
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| 286 | /* If nothing else to send disable interrupts */ |
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| 287 | ret = rtems_termios_dequeue_characters(tty0ttyp, 1); |
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[359e537] | 288 | |
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[e9ae97fb] | 289 | if ( ret == 0 ) { |
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| 290 | tty0port->IER &= ~IER_XMT; |
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| 291 | } |
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[359e537] | 292 | |
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[e9ae97fb] | 293 | break; |
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| 294 | case ISR_RxTO: |
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| 295 | case ISR_Rx : |
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| 296 | |
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| 297 | /* disable interrupts and notify termios */ |
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[359e537] | 298 | tty0port->IER &= ~IER_RCV; |
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[e9ae97fb] | 299 | |
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| 300 | /* read all bytes in fifo*/ |
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[359e537] | 301 | while (( off < sizeof(buf) ) && ( tty0port->LSR & LSR_RSR )) |
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[e9ae97fb] | 302 | { |
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| 303 | buf[off++] = tty0port->RBR; |
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| 304 | } |
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| 305 | |
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| 306 | break; |
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| 307 | case ISR_LS: |
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| 308 | /* RX error: eat character */ |
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| 309 | /* printk("********* Error **********\n"); */ |
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| 310 | break; |
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| 311 | default: |
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| 312 | /* Should not happen */ |
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| 313 | /* printk("error vect=%x",vect); */ |
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| 314 | return; |
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| 315 | } |
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| 316 | } |
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| 317 | |
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| 318 | } |
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| 319 | |
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| 320 | |
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[359e537] | 321 | /* |
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[e9ae97fb] | 322 | * |
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[359e537] | 323 | * deinit TTY0 |
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[e9ae97fb] | 324 | * |
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| 325 | */ |
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| 326 | void |
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[359e537] | 327 | tty0DeInit(void) |
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[e9ae97fb] | 328 | { |
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| 329 | /* |
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[359e537] | 330 | * disable interrupts for serial tty0port |
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| 331 | * set it to state to work with polling boot monitor, if any... |
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[e9ae97fb] | 332 | */ |
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| 333 | |
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| 334 | /* set up baud rate to original state */ |
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[c4cc8199] | 335 | tty0BaudSet(bsp_serial_rate); |
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[e9ae97fb] | 336 | |
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| 337 | tty0port->IER = 0; |
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| 338 | |
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| 339 | } |
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| 340 | |
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[359e537] | 341 | /* |
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[e9ae97fb] | 342 | * |
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[359e537] | 343 | * init SPI |
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[e9ae97fb] | 344 | * |
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| 345 | */ |
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[359e537] | 346 | rtems_status_code |
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| 347 | tty0Initialize(void) |
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[e9ae97fb] | 348 | { |
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| 349 | register unsigned tmp; |
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| 350 | rtems_isr_entry previous_isr; /* this is a dummy */ |
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| 351 | unsigned char _ier; |
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| 352 | unsigned char _tmp; |
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| 353 | |
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| 354 | /* |
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[359e537] | 355 | * Initialise the serial tty0port |
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[e9ae97fb] | 356 | */ |
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| 357 | |
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[359e537] | 358 | /* |
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[e9ae97fb] | 359 | * Select clock source and set uart internal clock divisor |
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| 360 | */ |
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| 361 | |
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[f9acc33] | 362 | __asm__ volatile ("mfdcr %0, 0x0b1" : "=r" (tmp)); /* CPC_CR0 0x0b1 */ |
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[e9ae97fb] | 363 | |
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| 364 | /* UART0 bit 24 0x80, UART1 bit 25 0x40 */ |
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[c4cc8199] | 365 | tmp |= (bsp_serial_external_clock ? (TTY0_USE_UART ? 0x40 : 0x80) : 0); |
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[e9ae97fb] | 366 | |
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[c4cc8199] | 367 | tmp |= (bsp_serial_external_clock ? 0: ((TTY0_UART_INTERNAL_CLOCK_DIVISOR -1) << 1)); |
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[e9ae97fb] | 368 | |
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[f9acc33] | 369 | __asm__ volatile ("mtdcr 0x0b1, %0" : "=r" (tmp) : "0" (tmp)); /* CPC_CR0 0x0b1*/ |
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[e9ae97fb] | 370 | |
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| 371 | /* Disable tty0port interrupts while changing hardware */ |
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| 372 | _ier = tty0port->IER; |
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| 373 | tty0port->IER = 0; |
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| 374 | |
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| 375 | /* set up tty0port control: 8 bit,1 stop,no parity */ |
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| 376 | tty0port->LCR = LCR_WL8 | LCR_SB1 | LCR_PN; |
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| 377 | |
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| 378 | /* set up baud rate */ |
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[c4cc8199] | 379 | tty0BaudSet(bsp_serial_rate); |
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[359e537] | 380 | |
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[e9ae97fb] | 381 | |
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| 382 | #ifdef TTY0_USE_INTERRUPT |
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| 383 | |
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| 384 | /* add rx/tx isr to vector table */ |
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| 385 | |
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[359e537] | 386 | if (TTY0_USE_UART==0) |
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[e9ae97fb] | 387 | ictrl_set_vector(tty0serial_ISR,PPC_IRQ_EXT_UART0,&previous_isr); |
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| 388 | else |
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| 389 | ictrl_set_vector(tty0serial_ISR,PPC_IRQ_EXT_UART1,&previous_isr); |
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[359e537] | 390 | |
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[e9ae97fb] | 391 | /* Enable and clear FIFO */ |
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| 392 | tty0port->FCR = FCR_FE | FCR_CRF | FCR_CTF | FCR_RT14; |
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| 393 | |
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| 394 | /* Read status to clear them */ |
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[359e537] | 395 | _tmp = tty0port->LSR; |
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[e9ae97fb] | 396 | _tmp = tty0port->RBR; |
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| 397 | _tmp = tty0port->MSR; |
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| 398 | |
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| 399 | /* Enable recive interrupts, don't enable TxInt yet */ |
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| 400 | tty0port->IER=IER_RCV; |
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| 401 | |
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| 402 | #else |
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| 403 | |
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| 404 | tty0port->IER=_ier; |
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| 405 | |
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| 406 | #endif |
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| 407 | |
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| 408 | atexit(tty0DeInit); |
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| 409 | |
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| 410 | return RTEMS_SUCCESSFUL; |
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| 411 | } |
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| 412 | |
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| 413 | /* |
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| 414 | *************** |
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| 415 | * BOILERPLATE * |
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| 416 | *************** |
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| 417 | */ |
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| 418 | |
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| 419 | /* console_initialize |
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| 420 | * |
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| 421 | * This routine initializes the console IO driver. |
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| 422 | * |
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| 423 | * Input parameters: NONE |
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| 424 | * |
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| 425 | * Output parameters: NONE |
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| 426 | * |
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| 427 | * Return values: |
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| 428 | */ |
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| 429 | |
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| 430 | rtems_device_driver tty0_initialize( |
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| 431 | rtems_device_major_number major, |
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| 432 | rtems_device_minor_number minor, |
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| 433 | void *arg |
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| 434 | ) |
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| 435 | { |
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| 436 | rtems_status_code status; |
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| 437 | |
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| 438 | |
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| 439 | /* |
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| 440 | * Set up TERMIOS |
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| 441 | */ |
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| 442 | rtems_termios_initialize (); |
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| 443 | |
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| 444 | /* |
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| 445 | * Do device-specific initialization |
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| 446 | */ |
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[359e537] | 447 | |
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[e9ae97fb] | 448 | /*tty0Initialize (); Moved this to open instead */ |
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[359e537] | 449 | |
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[e9ae97fb] | 450 | /* |
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| 451 | * Register the device |
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| 452 | */ |
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| 453 | status = rtems_io_register_name ("/dev/ttyS0", major, 0); |
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| 454 | if (status != RTEMS_SUCCESSFUL) |
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| 455 | rtems_fatal_error_occurred (status); |
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| 456 | return RTEMS_SUCCESSFUL; |
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| 457 | } |
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| 458 | |
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| 459 | |
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| 460 | /* |
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| 461 | * Open entry point |
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| 462 | */ |
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[359e537] | 463 | |
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[e9ae97fb] | 464 | rtems_device_driver tty0_open( |
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| 465 | rtems_device_major_number major, |
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| 466 | rtems_device_minor_number minor, |
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| 467 | void * arg |
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| 468 | ) |
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| 469 | { |
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| 470 | rtems_status_code sc; |
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| 471 | |
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| 472 | #ifdef TTY0_USE_INTERRUPT |
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| 473 | |
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| 474 | static const rtems_termios_callbacks intrCallbacks = { |
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| 475 | NULL, /* firstOpen */ |
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| 476 | NULL, /* lastClose */ |
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| 477 | NULL, /* pollRead */ |
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| 478 | tty0InterruptWrite, /* write */ |
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| 479 | tty0SetAttributes, /* setAttributes */ |
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| 480 | NULL, /* stopRemoteTx */ |
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| 481 | NULL, /* startRemoteTx */ |
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| 482 | TERMIOS_TASK_DRIVEN /* outputUsesInterrupts */ |
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| 483 | }; |
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| 484 | rtems_libio_open_close_args_t *args = arg; |
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| 485 | |
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| 486 | tty0Initialize (); /* Initalize hardware */ |
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| 487 | |
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| 488 | sc = rtems_termios_open (major, minor, arg, &intrCallbacks); |
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| 489 | tty0ttyp = args->iop->data1; |
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| 490 | |
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| 491 | #else |
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| 492 | |
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| 493 | static const rtems_termios_callbacks pollCallbacks = { |
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| 494 | NULL, /* firstOpen */ |
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| 495 | NULL, /* lastClose */ |
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| 496 | tty0PollRead, /* pollRead */ |
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| 497 | tty0PollWrite, /* write */ |
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| 498 | tty0SetAttributes, /* setAttributes */ |
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| 499 | NULL, /* stopRemoteTx */ |
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| 500 | NULL, /* startRemoteTx */ |
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| 501 | 0 /* outputUsesInterrupts */ |
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| 502 | }; |
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| 503 | |
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| 504 | tty0Initialize (); /* Initalize hardware */ |
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| 505 | |
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| 506 | sc = rtems_termios_open (major, minor, arg, &pollCallbacks); |
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| 507 | |
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| 508 | #endif |
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| 509 | |
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| 510 | return sc; |
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| 511 | } |
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[359e537] | 512 | |
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[e9ae97fb] | 513 | /* |
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| 514 | * Close entry point |
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| 515 | */ |
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[359e537] | 516 | |
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[e9ae97fb] | 517 | rtems_device_driver tty0_close( |
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| 518 | rtems_device_major_number major, |
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| 519 | rtems_device_minor_number minor, |
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| 520 | void * arg |
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| 521 | ) |
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| 522 | { |
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| 523 | return rtems_termios_close (arg); |
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| 524 | } |
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[359e537] | 525 | |
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[e9ae97fb] | 526 | /* |
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| 527 | * read bytes from the serial port. We only have stdin. |
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| 528 | */ |
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[359e537] | 529 | |
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[e9ae97fb] | 530 | rtems_device_driver tty0_read( |
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| 531 | rtems_device_major_number major, |
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| 532 | rtems_device_minor_number minor, |
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| 533 | void * arg |
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| 534 | ) |
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| 535 | { |
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| 536 | return rtems_termios_read (arg); |
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| 537 | } |
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[359e537] | 538 | |
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[e9ae97fb] | 539 | /* |
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| 540 | * write bytes to the serial port. Stdout and stderr are the same. |
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| 541 | */ |
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[359e537] | 542 | |
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[e9ae97fb] | 543 | rtems_device_driver tty0_write( |
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| 544 | rtems_device_major_number major, |
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| 545 | rtems_device_minor_number minor, |
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| 546 | void * arg |
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| 547 | ) |
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| 548 | { |
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| 549 | return rtems_termios_write (arg); |
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| 550 | } |
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[359e537] | 551 | |
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[e9ae97fb] | 552 | /* |
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| 553 | * IO Control entry point |
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| 554 | */ |
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[359e537] | 555 | |
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[e9ae97fb] | 556 | rtems_device_driver tty0_control( |
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| 557 | rtems_device_major_number major, |
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| 558 | rtems_device_minor_number minor, |
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| 559 | void * arg |
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| 560 | ) |
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| 561 | { |
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| 562 | return rtems_termios_ioctl (arg); |
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| 563 | } |
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