source: rtems/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.h @ e1df032

4.104.114.9
Last change on this file since e1df032 was e1df032, checked in by Till Straumann <strauman@…>, on Jul 10, 2008 at 9:51:55 PM

2008-07-10 Till Straumann <strauman@…>

  • ChangeLog?, mpc8xx/clock/clock.c, ppc403/clock/clock.c, ppc403/irq/ictrl.h, rtems/powerpc/powerpc.h: Removed all macro definitions which depended on the compiler defining a PPC CPU-model dependent symbol from files in cpukit. Macros which were not used by cpukit have been moved to libcpu/powerpc/rtems/powerpc/powerpc.h.
  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*  ictrl.h
2 *
3 *  This file contains definitions and declarations for the
4 *  PowerPC 403 CPU built-in external interrupt controller
5 *
6 *
7 *  Author: Thomas Doerfler <td@imd.m.isar.de>
8 *
9 *  COPYRIGHT (c) 1998 by IMD, Puchheim, Germany
10 *
11 *  To anyone who acknowledges that this file is provided "AS IS"
12 *  without any express or implied warranty:
13 *      permission to use, copy, modify, and distribute this file
14 *      for any purpose is hereby granted without fee, provided that
15 *      the above copyright notice and this notice appears in all
16 *      copies, and that the name of IMD not be used in
17 *      advertising or publicity pertaining to distribution of the
18 *      software without specific, written prior permission.
19 *      IMD makes no representations about the suitability
20 *      of this software for any purpose.
21 *
22 *  Modifications for PPC405GP by Dennis Ehlin
23 *
24 */
25
26
27#ifndef _ICTRL_H
28#define _ICTRL_H
29
30#include <rtems.h>
31#include <rtems/system.h>
32#include <rtems/score/isr.h>
33#include <rtems/powerpc/powerpc.h>
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38/*
39 *  definitions for second level IRQ handler support
40 *  External Interrupts via EXTERNAL/EISR
41 */
42#define PPC_IRQ_EXT_BASE        (PPC_IRQ_LAST+1)
43
44/* mask for external interrupt status in EXIER/EXISR register */
45/* note: critical interrupt is in these registers aswell */
46#ifndef ppc405
47#define PPC_EXI_MASK           0x0FFFFFFF
48#else /* ppc405 */
49#define PPC_EXI_MASK           0xFFFFFFFF
50#endif /* ppc405 */
51
52#ifndef ppc405
53#define PPC_IRQ_EXT_SPIR        (PPC_IRQ_EXT_BASE+4)
54#define PPC_IRQ_EXT_SPIT        (PPC_IRQ_EXT_BASE+5)
55#else /* ppc405 */
56#define PPC_IRQ_EXT_UART0       (PPC_IRQ_EXT_BASE+0)
57#define PPC_IRQ_EXT_UART1       (PPC_IRQ_EXT_BASE+1)
58#endif /* ppc405 */
59#define PPC_IRQ_EXT_JTAGR       (PPC_IRQ_EXT_BASE+6)
60#define PPC_IRQ_EXT_JTAGT       (PPC_IRQ_EXT_BASE+7)
61#define PPC_IRQ_EXT_DMA0        (PPC_IRQ_EXT_BASE+8)
62#define PPC_IRQ_EXT_DMA1        (PPC_IRQ_EXT_BASE+9)
63#define PPC_IRQ_EXT_DMA2        (PPC_IRQ_EXT_BASE+10)
64#define PPC_IRQ_EXT_DMA3        (PPC_IRQ_EXT_BASE+11)
65#define PPC_IRQ_EXT_0           (PPC_IRQ_EXT_BASE+27)
66#define PPC_IRQ_EXT_1           (PPC_IRQ_EXT_BASE+28)
67#define PPC_IRQ_EXT_2           (PPC_IRQ_EXT_BASE+29)
68#define PPC_IRQ_EXT_3           (PPC_IRQ_EXT_BASE+30)
69#define PPC_IRQ_EXT_4           (PPC_IRQ_EXT_BASE+31)
70
71#define PPC_IRQ_EXT_MAX         (32)
72
73#define VEC_TO_EXMSK(v)         (0x80000000 >> (v))
74
75/*
76 *
77 * install a user vector for one of the external interrupt sources
78 *
79 */ 
80rtems_status_code
81ictrl_set_vector(rtems_isr_entry   new_handler,
82                 uint32_t          vector,
83                 rtems_isr_entry   *old_handler
84);
85/*
86 * activate the interrupt controller
87 */
88rtems_status_code
89ictrl_init(void);
90
91#ifdef __cplusplus
92}
93#endif
94
95#endif /* _ICTRL_H */
96/* end of include file */
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