1 | |
---|
2 | |
---|
3 | /* SDRAM DCRs */ |
---|
4 | enum { |
---|
5 | SDRAM0_BESR0 = 0, |
---|
6 | SDRAM0_BESR1 = 8, |
---|
7 | SDRAM0_BEAR = 0x10, |
---|
8 | SDRAM0_CFG = 0x20, |
---|
9 | SDRAM0_STATUS = 0x24, |
---|
10 | SDRAM0_RTR = 0x30, |
---|
11 | SDRAM0_PMIT = 0x34, |
---|
12 | SDRAM0_TR = 0x80 |
---|
13 | }; |
---|
14 | |
---|
15 | |
---|
16 | /* EBC DCRs */ |
---|
17 | enum { |
---|
18 | EBC0_B0CR = 0, |
---|
19 | EBC0_B1CR = 1, |
---|
20 | EBC0_B2CR = 2, |
---|
21 | EBC0_B3CR = 3, |
---|
22 | EBC0_B4CR = 4, |
---|
23 | EBC0_B5CR = 5, |
---|
24 | EBC0_B6CR = 6, |
---|
25 | EBC0_B7CR = 7, |
---|
26 | EBC0_B0AP = 0x10, |
---|
27 | EBC0_B1AP = 0x11, |
---|
28 | EBC0_B2AP = 0x12, |
---|
29 | EBC0_B3AP = 0x13, |
---|
30 | EBC0_B4AP = 0x14, |
---|
31 | EBC0_B5AP = 0x15, |
---|
32 | EBC0_B6AP = 0x16, |
---|
33 | EBC0_B7AP = 0x17, |
---|
34 | EBC0_BEAR = 0x20, |
---|
35 | EBC0_BESR0 = 0x21, |
---|
36 | EBC0_BESR1 = 0x22, |
---|
37 | EBC0_CFG = 0x23 |
---|
38 | }; |
---|
39 | |
---|
40 | /* Memory-mapped registers */ |
---|
41 | |
---|
42 | typedef struct EthernetRegisters_GP { |
---|
43 | uint32_t mode0; |
---|
44 | uint32_t mode1; |
---|
45 | uint32_t xmtMode0; |
---|
46 | uint32_t xmtMode1; |
---|
47 | uint32_t rcvMode; |
---|
48 | uint32_t intStatus; |
---|
49 | uint32_t intEnable; |
---|
50 | uint32_t addrHi; |
---|
51 | uint32_t addrLo; |
---|
52 | uint32_t VLANTPID; |
---|
53 | uint32_t VLANTCI; |
---|
54 | uint32_t pauseTimer; |
---|
55 | uint32_t indivHash[4]; |
---|
56 | uint32_t groupHash[4]; |
---|
57 | uint32_t lastSrcLo; |
---|
58 | uint32_t lastSrcHi; |
---|
59 | uint32_t IPGap; |
---|
60 | uint32_t STAcontrol; |
---|
61 | uint32_t xmtReqThreshold; |
---|
62 | uint32_t rcvWatermark; |
---|
63 | uint32_t bytesXmtd; |
---|
64 | uint32_t bytesRcvd; |
---|
65 | } EthernetRegisters_GP; |
---|
66 | |
---|
67 | enum { EMACAddress = 0xEF600800 }; |
---|
68 | |
---|
69 | enum { |
---|
70 | // Mode 0 bits |
---|
71 | kEMACRxIdle = 0x80000000, |
---|
72 | kEMACTxIdle = 0x40000000, |
---|
73 | kEMACSoftRst = 0x20000000, |
---|
74 | kEMACTxEnable = 0x10000000, |
---|
75 | kEMACRxEnable = 0x08000000, |
---|
76 | |
---|
77 | // Mode 1 bits |
---|
78 | kEMACFullDuplex = 0x80000000, |
---|
79 | kEMACIgnoreSQE = 0x01000000, |
---|
80 | kEMAC100MBbps = 0x00400000, |
---|
81 | kEMAC4KRxFIFO = 0x00300000, |
---|
82 | kEMAC2KTxFIFO = 0x00080000, |
---|
83 | kEMACTx0Multi = 0x00008000, |
---|
84 | kEMACTxDependent= 0x00014000, |
---|
85 | |
---|
86 | // Tx mode bits |
---|
87 | kEMACNewPacket0 = 0x80000000, |
---|
88 | kEMACNewPacket1 = 0x40000000, |
---|
89 | |
---|
90 | // Receive mode bits |
---|
91 | kEMACStripPadding = 0x80000000, |
---|
92 | kEMACStripFCS = 0x40000000, |
---|
93 | kEMACRcvRunts = 0x20000000, |
---|
94 | kEMACRcvFCSErrs = 0x10000000, |
---|
95 | kEMACRcvOversize = 0x08000000, |
---|
96 | kEMACPromiscRcv = 0x01000000, |
---|
97 | kEMACPromMultRcv = 0x00800000, |
---|
98 | kEMACIndivRcv = 0x00400000, |
---|
99 | kEMACHashRcv = 0x00200000, |
---|
100 | kEMACBrcastRcv = 0x00100000, |
---|
101 | kEMACMultcastRcv = 0x00080000, |
---|
102 | |
---|
103 | // Buffer descriptor control bits |
---|
104 | kMALTxReady = 0x8000, |
---|
105 | kMALRxEmpty = 0x8000, |
---|
106 | kMALWrap = 0x4000, |
---|
107 | kMALContinuous = 0x2000, |
---|
108 | kMALLast = 0x1000, |
---|
109 | kMALRxFirst = 0x0800, |
---|
110 | kMALInterrupt = 0x0400, |
---|
111 | |
---|
112 | // EMAC Tx descriptor bits sent |
---|
113 | kEMACGenFCS = 0x200, |
---|
114 | kEMACGenPad = 0x100, |
---|
115 | kEMACInsSrcAddr = 0x080, |
---|
116 | kEMACRepSrcAddr = 0x040, |
---|
117 | kEMACInsVLAN = 0x020, |
---|
118 | kEMACRepVLAN = 0x010, |
---|
119 | |
---|
120 | // EMAC TX descriptor bits returned |
---|
121 | kEMACErrMask = 0x3FF, |
---|
122 | kEMACFCSWrong = 0x200, |
---|
123 | kEMACBadPrev = 0x100, |
---|
124 | kEMACLostCarrier = 0x080, |
---|
125 | kEMACDeferred = 0x040, |
---|
126 | kEMACCollFail = 0x020, |
---|
127 | kEMACLateColl = 0x010, |
---|
128 | kEMACMultColl = 0x008, |
---|
129 | kEMACOneColl = 0x004, |
---|
130 | kEMACUnderrun = 0x002, |
---|
131 | kEMACSQEFail = 0x001, |
---|
132 | |
---|
133 | // EMAC Rx descriptor bits returned |
---|
134 | kEMACOverrun = 0x200, |
---|
135 | kEMACPausePkt = 0x100, |
---|
136 | kEMACBadPkt = 0x080, |
---|
137 | kEMACRuntPkt = 0x040, |
---|
138 | kEMACShortEvt = 0x020, |
---|
139 | kEMACAlignErr = 0x010, |
---|
140 | kEMACBadFCS = 0x008, |
---|
141 | kEMACPktLong = 0x004, |
---|
142 | kEMACPktOOR = 0x002, |
---|
143 | kEMACPktIRL = 0x001 |
---|
144 | }; |
---|
145 | |
---|
146 | |
---|