source: rtems/c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h @ d3d9ef37

4.104.114.84.95
Last change on this file since d3d9ef37 was a859df85, checked in by Ralf Corsepius <ralf.corsepius@…>, on 02/13/05 at 05:00:15

New header guards.

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/*  ictrl.h
2 *
3 *  This file contains definitions and declarations for the
4 *  PowerPC 403 CPU built-in external interrupt controller
5 *
6 *
7 *  Author: Thomas Doerfler <td@imd.m.isar.de>
8 *
9 *  COPYRIGHT (c) 1998 by IMD, Puchheim, Germany
10 *
11 *  To anyone who acknowledges that this file is provided "AS IS"
12 *  without any express or implied warranty:
13 *      permission to use, copy, modify, and distribute this file
14 *      for any purpose is hereby granted without fee, provided that
15 *      the above copyright notice and this notice appears in all
16 *      copies, and that the name of IMD not be used in
17 *      advertising or publicity pertaining to distribution of the
18 *      software without specific, written prior permission.
19 *      IMD makes no representations about the suitability
20 *      of this software for any purpose.
21 *
22 *  Modifications for PPC405GP by Dennis Ehlin
23 *
24 */
25
26
27#ifndef _ICTRL_H
28#define _ICTRL_H
29
30#include <rtems.h>
31#include <rtems/system.h>
32#include <rtems/score/isr.h>
33#ifdef __cplusplus
34extern "C" {
35#endif
36
37/*
38 *  definitions for second level IRQ handler support
39 *  External Interrupts via EXTERNAL/EISR
40 */
41#define PPC_IRQ_EXT_BASE        (PPC_IRQ_LAST+1)
42
43/* mask for external interrupt status in EXIER/EXISR register */
44/* note: critical interrupt is in these registers aswell */
45#ifndef ppc405
46#define PPC_EXI_MASK           0x0FFFFFFF
47#else /* ppc405 */
48#define PPC_EXI_MASK           0xFFFFFFFF
49#endif /* ppc405 */
50
51#ifndef ppc405
52#define PPC_IRQ_EXT_SPIR        (PPC_IRQ_EXT_BASE+4)
53#define PPC_IRQ_EXT_SPIT        (PPC_IRQ_EXT_BASE+5)
54#else /* ppc405 */
55#define PPC_IRQ_EXT_UART0       (PPC_IRQ_EXT_BASE+0)
56#define PPC_IRQ_EXT_UART1       (PPC_IRQ_EXT_BASE+1)
57#endif /* ppc405 */
58#define PPC_IRQ_EXT_JTAGR       (PPC_IRQ_EXT_BASE+6)
59#define PPC_IRQ_EXT_JTAGT       (PPC_IRQ_EXT_BASE+7)
60#define PPC_IRQ_EXT_DMA0        (PPC_IRQ_EXT_BASE+8)
61#define PPC_IRQ_EXT_DMA1        (PPC_IRQ_EXT_BASE+9)
62#define PPC_IRQ_EXT_DMA2        (PPC_IRQ_EXT_BASE+10)
63#define PPC_IRQ_EXT_DMA3        (PPC_IRQ_EXT_BASE+11)
64#define PPC_IRQ_EXT_0           (PPC_IRQ_EXT_BASE+27)
65#define PPC_IRQ_EXT_1           (PPC_IRQ_EXT_BASE+28)
66#define PPC_IRQ_EXT_2           (PPC_IRQ_EXT_BASE+29)
67#define PPC_IRQ_EXT_3           (PPC_IRQ_EXT_BASE+30)
68#define PPC_IRQ_EXT_4           (PPC_IRQ_EXT_BASE+31)
69
70#define PPC_IRQ_EXT_MAX         (32)
71
72#define VEC_TO_EXMSK(v)         (0x80000000 >> (v))
73
74/*
75 *
76 * install a user vector for one of the external interrupt sources
77 *
78 */
79rtems_status_code
80ictrl_set_vector(rtems_isr_entry   new_handler,
81                 uint32_t          vector,
82                 rtems_isr_entry   *old_handler
83);
84/*
85 * activate the interrupt controller
86 */
87rtems_status_code
88ictrl_init(void);
89
90#ifdef __cplusplus
91}
92#endif
93
94#endif /* _ICTRL_H */
95/* end of include file */
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