1 | /* ictrl.h |
---|
2 | * |
---|
3 | * This file contains definitions and declarations for the |
---|
4 | * PowerPC 403 CPU built-in external interrupt controller |
---|
5 | * |
---|
6 | * |
---|
7 | * Author: Thomas Doerfler <td@imd.m.isar.de> |
---|
8 | * |
---|
9 | * COPYRIGHT (c) 1998 by IMD, Puchheim, Germany |
---|
10 | * |
---|
11 | * To anyone who acknowledges that this file is provided "AS IS" |
---|
12 | * without any express or implied warranty: |
---|
13 | * permission to use, copy, modify, and distribute this file |
---|
14 | * for any purpose is hereby granted without fee, provided that |
---|
15 | * the above copyright notice and this notice appears in all |
---|
16 | * copies, and that the name of IMD not be used in |
---|
17 | * advertising or publicity pertaining to distribution of the |
---|
18 | * software without specific, written prior permission. |
---|
19 | * IMD makes no representations about the suitability |
---|
20 | * of this software for any purpose. |
---|
21 | * |
---|
22 | */ |
---|
23 | |
---|
24 | |
---|
25 | #ifndef _INCLUDE_ICTRL_h |
---|
26 | #define _INCLUDE_ICTRL_h |
---|
27 | |
---|
28 | #include <rtems.h> |
---|
29 | #include <rtems/system.h> |
---|
30 | #include <rtems/score/isr.h> |
---|
31 | #ifdef __cplusplus |
---|
32 | extern "C" { |
---|
33 | #endif |
---|
34 | |
---|
35 | /* |
---|
36 | * definitions for second level IRQ handler support |
---|
37 | * External Interrupts via EXTERNAL/EISR |
---|
38 | */ |
---|
39 | #define PPC_IRQ_EXT_BASE (PPC_IRQ_LAST+1) |
---|
40 | |
---|
41 | /* mask for external interrupt status in EXIER/EXISR register */ |
---|
42 | /* note: critical interrupt is in these registers aswell */ |
---|
43 | #define PPC_EXI_MASK 0x0FFFFFFF |
---|
44 | |
---|
45 | #define PPC_IRQ_EXT_SPIR (PPC_IRQ_EXT_BASE+4) |
---|
46 | #define PPC_IRQ_EXT_SPIT (PPC_IRQ_EXT_BASE+5) |
---|
47 | #define PPC_IRQ_EXT_JTAGR (PPC_IRQ_EXT_BASE+6) |
---|
48 | #define PPC_IRQ_EXT_JTAGT (PPC_IRQ_EXT_BASE+7) |
---|
49 | #define PPC_IRQ_EXT_DMA0 (PPC_IRQ_EXT_BASE+8) |
---|
50 | #define PPC_IRQ_EXT_DMA1 (PPC_IRQ_EXT_BASE+9) |
---|
51 | #define PPC_IRQ_EXT_DMA2 (PPC_IRQ_EXT_BASE+10) |
---|
52 | #define PPC_IRQ_EXT_DMA3 (PPC_IRQ_EXT_BASE+11) |
---|
53 | #define PPC_IRQ_EXT_0 (PPC_IRQ_EXT_BASE+27) |
---|
54 | #define PPC_IRQ_EXT_1 (PPC_IRQ_EXT_BASE+28) |
---|
55 | #define PPC_IRQ_EXT_2 (PPC_IRQ_EXT_BASE+29) |
---|
56 | #define PPC_IRQ_EXT_3 (PPC_IRQ_EXT_BASE+30) |
---|
57 | #define PPC_IRQ_EXT_4 (PPC_IRQ_EXT_BASE+31) |
---|
58 | |
---|
59 | #define PPC_IRQ_EXT_MAX (32) |
---|
60 | |
---|
61 | #define VEC_TO_EXMSK(v) (0x80000000 >> (v)) |
---|
62 | |
---|
63 | /* |
---|
64 | * |
---|
65 | * install a user vector for one of the external interrupt sources |
---|
66 | * |
---|
67 | */ |
---|
68 | rtems_status_code |
---|
69 | ictrl_set_vector(rtems_isr_entry new_handler, |
---|
70 | unsigned32 vector, |
---|
71 | rtems_isr_entry *old_handler |
---|
72 | ); |
---|
73 | /* |
---|
74 | * activate the interrupt controller |
---|
75 | */ |
---|
76 | rtems_status_code |
---|
77 | ictrl_init(void); |
---|
78 | |
---|
79 | #ifdef __cplusplus |
---|
80 | } |
---|
81 | #endif |
---|
82 | |
---|
83 | #endif /* ! _INCLUDE_ICTRL_h */ |
---|
84 | /* end of include file */ |
---|