[3235ad9] | 1 | /* |
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| 2 | * This file contains the PowerPC 403GA console IO package. |
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| 3 | * |
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[aecfa2b] | 4 | * Author: Thomas Doerfler <td@imd.m.isar.de> |
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| 5 | * IMD Ingenieurbuero fuer Microcomputertechnik |
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| 6 | * |
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| 7 | * COPYRIGHT (c) 1998 by IMD |
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| 8 | * |
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| 9 | * Changes from IMD are covered by the original distributions terms. |
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| 10 | * changes include interrupt support and termios support |
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| 11 | * for backward compatibility, the original polled driver has been |
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| 12 | * renamed to console.c.polled |
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| 13 | * |
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| 14 | * This file has been initially created (polled version) by |
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| 15 | * |
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[e57b0e2] | 16 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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[3235ad9] | 17 | * |
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| 18 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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| 19 | * |
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| 20 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 21 | * without any express or implied warranty: |
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| 22 | * permission to use, copy, modify, and distribute this file |
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| 23 | * for any purpose is hereby granted without fee, provided that |
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| 24 | * the above copyright notice and this notice appears in all |
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| 25 | * copies, and that the name of i-cubed limited not be used in |
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| 26 | * advertising or publicity pertaining to distribution of the |
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| 27 | * software without specific, written prior permission. |
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| 28 | * i-cubed limited makes no representations about the suitability |
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| 29 | * of this software for any purpose. |
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| 30 | * |
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[aecfa2b] | 31 | * Modifications for spooling (interrupt driven) console driver |
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| 32 | * by Thomas Doerfler <td@imd.m.isar.de> |
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| 33 | * for these modifications: |
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| 34 | * COPYRIGHT (c) 1997 by IMD, Puchheim, Germany. |
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| 35 | * |
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| 36 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 37 | * without any express or implied warranty: |
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| 38 | * permission to use, copy, modify, and distribute this file |
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| 39 | * for any purpose is hereby granted without fee, provided that |
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| 40 | * the above copyright notice and this notice appears in all |
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| 41 | * copies. IMD makes no representations about the suitability |
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| 42 | * of this software for any purpose. |
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| 43 | * |
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[3235ad9] | 44 | * Derived from c/src/lib/libbsp/no_cpu/no_bsp/console/console.c: |
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| 45 | * |
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[aecfa2b] | 46 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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[3235ad9] | 47 | * On-Line Applications Research Corporation (OAR). |
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[aecfa2b] | 48 | * All rights assigned to U.S. Government, 1994. |
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[3235ad9] | 49 | * |
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[aecfa2b] | 50 | * This material may be reproduced by or for the U.S. Government pursuant |
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| 51 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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| 52 | * notice must appear in all copies of this file and its derivatives. |
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[3235ad9] | 53 | * |
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[aecfa2b] | 54 | * console.c,v 1.4 1995/12/05 19:23:02 joel Exp |
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[3235ad9] | 55 | */ |
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| 56 | |
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| 57 | #define NO_BSP_INIT |
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| 58 | |
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[f817b02] | 59 | #include <rtems.h> |
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[3a4ae6c] | 60 | #include <rtems/libio.h> |
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[aecfa2b] | 61 | #include "../ictrl/ictrl.h" |
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| 62 | #include <stdlib.h> /* for atexit() */ |
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[3235ad9] | 63 | |
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| 64 | struct async { |
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[aecfa2b] | 65 | /*---------------------------------------------------------------------------+ |
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[3235ad9] | 66 | | Line Status Register. |
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[aecfa2b] | 67 | +---------------------------------------------------------------------------*/ |
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| 68 | unsigned char SPLS; |
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| 69 | unsigned char SPLSset; |
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[3235ad9] | 70 | #define LSRDataReady 0x80 |
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| 71 | #define LSRFramingError 0x40 |
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| 72 | #define LSROverrunError 0x20 |
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| 73 | #define LSRParityError 0x10 |
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| 74 | #define LSRBreakInterrupt 0x08 |
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| 75 | #define LSRTxHoldEmpty 0x04 |
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| 76 | #define LSRTxShiftEmpty 0x02 |
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| 77 | |
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[aecfa2b] | 78 | /*---------------------------------------------------------------------------+ |
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[3235ad9] | 79 | | Handshake Status Register. |
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[aecfa2b] | 80 | +---------------------------------------------------------------------------*/ |
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| 81 | unsigned char SPHS; |
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| 82 | unsigned char SPHSset; |
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[3235ad9] | 83 | #define HSRDsr 0x80 |
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| 84 | #define HSRCts 0x40 |
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| 85 | |
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[aecfa2b] | 86 | /*---------------------------------------------------------------------------+ |
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[3235ad9] | 87 | | Baud rate divisor registers |
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[aecfa2b] | 88 | +---------------------------------------------------------------------------*/ |
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| 89 | unsigned char BRDH; |
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| 90 | unsigned char BRDL; |
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[3235ad9] | 91 | |
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[aecfa2b] | 92 | /*---------------------------------------------------------------------------+ |
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[3235ad9] | 93 | | Control Register. |
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[aecfa2b] | 94 | +---------------------------------------------------------------------------*/ |
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| 95 | unsigned char SPCTL; |
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| 96 | #define CRNormal 0x00 |
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| 97 | #define CRLoopback 0x40 |
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| 98 | #define CRAutoEcho 0x80 |
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[3235ad9] | 99 | #define CRDtr 0x20 |
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| 100 | #define CRRts 0x10 |
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| 101 | #define CRWordLength7 0x00 |
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| 102 | #define CRWordLength8 0x08 |
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| 103 | #define CRParityDisable 0x00 |
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| 104 | #define CRParityEnable 0x04 |
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| 105 | #define CREvenParity 0x00 |
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[aecfa2b] | 106 | #define CROddParity 0x02 |
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[3235ad9] | 107 | #define CRStopBitsOne 0x00 |
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| 108 | #define CRStopBitsTwo 0x01 |
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[aecfa2b] | 109 | #define CRDisableDtrRts 0x00 |
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[3235ad9] | 110 | |
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[aecfa2b] | 111 | /*--------------------------------------------------------------------------+ |
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[3235ad9] | 112 | | Receiver Command Register. |
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[aecfa2b] | 113 | +--------------------------------------------------------------------------*/ |
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| 114 | unsigned char SPRC; |
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| 115 | #define RCRDisable 0x00 |
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| 116 | #define RCREnable 0x80 |
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| 117 | #define RCRIntDisable 0x00 |
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| 118 | #define RCRIntEnabled 0x20 |
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| 119 | #define RCRDMACh2 0x40 |
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| 120 | #define RCRDMACh3 0x60 |
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| 121 | #define RCRErrorInt 0x10 |
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| 122 | #define RCRPauseEnable 0x08 |
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| 123 | |
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| 124 | /*--------------------------------------------------------------------------+ |
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[3235ad9] | 125 | | Transmitter Command Register. |
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[aecfa2b] | 126 | +--------------------------------------------------------------------------*/ |
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[3235ad9] | 127 | unsigned char SPTC; |
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[aecfa2b] | 128 | #define TCRDisable 0x00 |
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| 129 | #define TCREnable 0x80 |
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| 130 | #define TCRIntDisable 0x00 |
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| 131 | #define TCRIntEnabled 0x20 |
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| 132 | #define TCRDMACh2 0x40 |
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| 133 | #define TCRDMACh3 0x60 |
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| 134 | #define TCRTxEmpty 0x10 |
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| 135 | #define TCRErrorInt 0x08 |
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| 136 | #define TCRStopPause 0x04 |
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| 137 | #define TCRBreakGen 0x02 |
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| 138 | |
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| 139 | /*--------------------------------------------------------------------------+ |
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[3235ad9] | 140 | | Miscellanies defines. |
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[aecfa2b] | 141 | +--------------------------------------------------------------------------*/ |
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| 142 | unsigned char SPTB; |
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[3235ad9] | 143 | #define SPRB SPTB |
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| 144 | }; |
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| 145 | |
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| 146 | typedef volatile struct async *pasync; |
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| 147 | static const pasync port = (pasync)0x40000000; |
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| 148 | |
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[aecfa2b] | 149 | static void *spittyp; /* handle for termios */ |
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[e9ae97fb] | 150 | int ppc403_spi_interrupt = 1; /* use interrupts... */ |
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[aecfa2b] | 151 | |
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| 152 | /* |
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| 153 | * Rx Interrupt handler |
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[3235ad9] | 154 | */ |
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[aecfa2b] | 155 | static rtems_isr |
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| 156 | spiRxInterruptHandler (rtems_vector_number v) |
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| 157 | { |
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| 158 | char ch; |
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| 159 | |
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| 160 | /* clear any receive errors (errors are ignored now) */ |
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| 161 | port->SPLS = (LSRFramingError | LSROverrunError | |
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| 162 | LSRParityError | LSRBreakInterrupt); |
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| 163 | /* |
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| 164 | * Buffer received? |
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| 165 | */ |
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| 166 | if (port->SPLS & LSRDataReady) { |
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| 167 | ch = port->SPRB; /* read receive buffer */ |
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| 168 | rtems_termios_enqueue_raw_characters (spittyp,&ch,1); |
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| 169 | } |
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| 170 | } |
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[3235ad9] | 171 | |
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[aecfa2b] | 172 | /* |
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| 173 | * Tx Interrupt handler |
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| 174 | */ |
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| 175 | static rtems_isr |
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| 176 | spiTxInterruptHandler (rtems_vector_number v) |
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[3235ad9] | 177 | { |
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[aecfa2b] | 178 | /* |
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| 179 | * char transmitted? |
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| 180 | */ |
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| 181 | if (0 != (port->SPLS & LSRTxHoldEmpty)) { /* must always be true!! */ |
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| 182 | port->SPTC &= ~TCRIntEnabled; /* stop irqs for now... */ |
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| 183 | /* and call termios... */ |
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| 184 | rtems_termios_dequeue_characters (spittyp,1); |
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| 185 | } |
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| 186 | } |
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[3235ad9] | 187 | |
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[aecfa2b] | 188 | /* |
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| 189 | * enable/disable RTS line to start/stop remote transmitter |
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| 190 | */ |
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| 191 | static int |
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| 192 | spiStartRemoteTx (int minor) |
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| 193 | { |
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| 194 | rtems_interrupt_level level; |
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[3235ad9] | 195 | |
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[aecfa2b] | 196 | rtems_interrupt_disable (level); |
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| 197 | port->SPCTL |= CRRts; /* activate RTS */ |
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| 198 | rtems_interrupt_enable (level); |
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| 199 | return 0; |
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[3235ad9] | 200 | } |
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| 201 | |
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[aecfa2b] | 202 | static int |
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| 203 | spiStopRemoteTx (int minor) |
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| 204 | { |
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| 205 | rtems_interrupt_level level; |
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[3235ad9] | 206 | |
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[aecfa2b] | 207 | rtems_interrupt_disable (level); |
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| 208 | port->SPCTL &= ~CRRts; /* deactivate RTS */ |
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| 209 | rtems_interrupt_enable (level); |
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| 210 | return 0; |
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| 211 | } |
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| 212 | |
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| 213 | void |
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| 214 | spiBaudSet(unsigned32 baudrate) |
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| 215 | { |
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| 216 | unsigned32 tmp; |
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[458bd34] | 217 | tmp = rtems_cpu_configuration_get_serial_per_sec() / baudrate; |
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[aecfa2b] | 218 | tmp = ((tmp) >> 4) - 1; |
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| 219 | port->BRDL = tmp & 0xff; |
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| 220 | port->BRDH = tmp >> 8; |
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| 221 | |
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| 222 | } |
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| 223 | /* |
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| 224 | * Hardware-dependent portion of tcsetattr(). |
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[3235ad9] | 225 | */ |
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[aecfa2b] | 226 | static int |
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| 227 | spiSetAttributes (int minor, const struct termios *t) |
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| 228 | { |
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| 229 | int baud; |
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| 230 | |
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| 231 | /* FIXME: check c_cflag & CRTSCTS for hardware flowcontrol */ |
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| 232 | /* FIXME: check and IMPLEMENT XON/XOFF */ |
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| 233 | switch (t->c_cflag & CBAUD) { |
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| 234 | default: baud = -1; break; |
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| 235 | case B50: baud = 50; break; |
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| 236 | case B75: baud = 75; break; |
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| 237 | case B110: baud = 110; break; |
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| 238 | case B134: baud = 134; break; |
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| 239 | case B150: baud = 150; break; |
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| 240 | case B200: baud = 200; break; |
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| 241 | case B300: baud = 300; break; |
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| 242 | case B600: baud = 600; break; |
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| 243 | case B1200: baud = 1200; break; |
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| 244 | case B1800: baud = 1800; break; |
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| 245 | case B2400: baud = 2400; break; |
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| 246 | case B4800: baud = 4800; break; |
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| 247 | case B9600: baud = 9600; break; |
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| 248 | case B19200: baud = 19200; break; |
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| 249 | case B38400: baud = 38400; break; |
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| 250 | case B57600: baud = 57600; break; |
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| 251 | case B115200: baud = 115200; break; |
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| 252 | case B230400: baud = 230400; break; |
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| 253 | case B460800: baud = 460800; break; |
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| 254 | } |
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| 255 | if (baud > 0) { |
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| 256 | spiBaudSet(baud); |
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| 257 | } |
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| 258 | return 0; |
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| 259 | } |
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[3235ad9] | 260 | |
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[aecfa2b] | 261 | static int |
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| 262 | spiPollRead (int minor) |
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[3235ad9] | 263 | { |
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| 264 | unsigned char status; |
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| 265 | |
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[aecfa2b] | 266 | while (0 == ((status = port->SPLS) & LSRDataReady)) { |
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| 267 | /* Clean any dodgy status */ |
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| 268 | if ((status & (LSRFramingError | LSROverrunError | LSRParityError | |
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| 269 | LSRBreakInterrupt)) != 0) { |
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[3235ad9] | 270 | port->SPLS = (LSRFramingError | LSROverrunError | LSRParityError | |
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[aecfa2b] | 271 | LSRBreakInterrupt); |
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[3235ad9] | 272 | } |
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[aecfa2b] | 273 | } |
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| 274 | return port->SPRB; |
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| 275 | } |
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| 276 | |
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| 277 | static int |
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| 278 | spiInterruptWrite (int minor, const char *buf, int len) |
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| 279 | { |
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| 280 | port->SPTB = *buf; /* write char to send */ |
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| 281 | port->SPTC |= TCRIntEnabled; /* always enable tx interrupt */ |
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| 282 | return 0; |
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| 283 | } |
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| 284 | |
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| 285 | static int |
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| 286 | spiPollWrite(int minor,const char *buf,int len) |
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| 287 | { |
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| 288 | unsigned char status; |
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[3235ad9] | 289 | |
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[aecfa2b] | 290 | while (len-- > 0) { |
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| 291 | do { |
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| 292 | if (port->SPHS) { |
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| 293 | port->SPHS = (HSRDsr | HSRCts); |
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| 294 | } |
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| 295 | status = port->SPLS; |
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| 296 | } while (0 == (status & LSRTxHoldEmpty)); |
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| 297 | port->SPTB = *buf++; |
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| 298 | } |
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| 299 | return 0; |
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[3235ad9] | 300 | } |
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| 301 | |
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[aecfa2b] | 302 | /* |
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[3235ad9] | 303 | * |
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[aecfa2b] | 304 | * deinit SPI |
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[3235ad9] | 305 | * |
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[aecfa2b] | 306 | */ |
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| 307 | void |
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| 308 | spiDeInit(void) |
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| 309 | { |
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| 310 | /* |
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| 311 | * disable interrupts for serial port |
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| 312 | * set it to state to work with polling boot monitor, if any... |
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| 313 | */ |
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| 314 | |
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| 315 | /* set up baud rate to original state */ |
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[458bd34] | 316 | spiBaudSet(rtems_cpu_configuration_get_serial_rate()); |
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[aecfa2b] | 317 | |
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| 318 | /* clear any receive (error) status */ |
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| 319 | port->SPLS = (LSRDataReady | LSRFramingError | LSROverrunError | |
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| 320 | LSRParityError | LSRBreakInterrupt); |
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| 321 | |
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| 322 | /* set up port control: DTR/RTS active,8 bit,1 stop,no parity */ |
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| 323 | port->SPCTL = (CRNormal | |
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| 324 | CRDtr | CRRts | |
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| 325 | CRWordLength8 | CRParityDisable | CRStopBitsOne); |
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| 326 | |
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| 327 | /* clear handshake status bits */ |
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| 328 | port->SPHS = (HSRDsr | HSRCts); |
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| 329 | |
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| 330 | /* enable receiver/transmitter, no interrupts */ |
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| 331 | port->SPRC = (RCREnable | RCRIntDisable); |
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| 332 | port->SPTC = (TCREnable | TCRIntDisable); |
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| 333 | |
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| 334 | } |
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| 335 | |
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| 336 | /* |
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[3235ad9] | 337 | * |
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[aecfa2b] | 338 | * init SPI |
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[3235ad9] | 339 | * |
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| 340 | */ |
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[aecfa2b] | 341 | rtems_status_code |
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| 342 | spiInitialize(void) |
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[3235ad9] | 343 | { |
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[aecfa2b] | 344 | register unsigned tmp; |
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| 345 | rtems_isr_entry previous_isr; /* this is a dummy */ |
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[3235ad9] | 346 | |
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[aecfa2b] | 347 | /* |
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| 348 | * Initialise the serial port |
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| 349 | */ |
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[3235ad9] | 350 | |
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[aecfa2b] | 351 | /* |
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| 352 | * select RTS/CTS hardware handshake lines, |
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| 353 | * select clock source |
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| 354 | */ |
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| 355 | asm volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */ |
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| 356 | |
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| 357 | tmp &= ~3; |
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[458bd34] | 358 | tmp |= (rtems_cpu_configuration_get_serial_external_clock() ? 2 : 0) | 1; |
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[aecfa2b] | 359 | |
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| 360 | asm volatile ("mtdcr 0xa0, %0" : "=r" (tmp) : "0" (tmp)); /* IOCR */ |
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| 361 | |
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| 362 | /* clear any receive (error) status */ |
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| 363 | port->SPLS = (LSRDataReady | LSRFramingError | LSROverrunError | |
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| 364 | LSRParityError | LSRBreakInterrupt); |
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| 365 | |
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| 366 | /* set up baud rate */ |
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[458bd34] | 367 | spiBaudSet(rtems_cpu_configuration_get_serial_rate()); |
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[aecfa2b] | 368 | |
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| 369 | /* set up port control: DTR/RTS active,8 bit,1 stop,no parity */ |
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| 370 | port->SPCTL = (CRNormal | |
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| 371 | CRDtr | CRRts | |
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| 372 | CRWordLength8 | CRParityDisable | CRStopBitsOne); |
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| 373 | |
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| 374 | /* clear handshake status bits */ |
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| 375 | port->SPHS = (HSRDsr | HSRCts); |
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| 376 | |
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| 377 | if (ppc403_spi_interrupt) { |
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| 378 | /* add rx/tx isr to vector table */ |
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| 379 | ictrl_set_vector(spiRxInterruptHandler, |
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| 380 | PPC_IRQ_EXT_SPIR, |
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| 381 | &previous_isr); |
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| 382 | |
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| 383 | ictrl_set_vector(spiTxInterruptHandler, |
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| 384 | PPC_IRQ_EXT_SPIT, |
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| 385 | &previous_isr); |
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| 386 | |
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| 387 | port->SPRC = (RCREnable | RCRIntEnabled | RCRErrorInt); |
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| 388 | port->SPTC = (TCREnable | TCRIntDisable); /* don't enable TxInt yet */ |
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| 389 | } |
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| 390 | else { |
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| 391 | /* enable receiver/transmitter, no interrupts */ |
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| 392 | port->SPRC = (RCREnable | RCRIntDisable); |
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| 393 | port->SPTC = (TCREnable | TCRIntDisable); |
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| 394 | } |
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| 395 | |
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| 396 | atexit(spiDeInit); |
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| 397 | |
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| 398 | return RTEMS_SUCCESSFUL; |
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| 399 | } |
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| 400 | |
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| 401 | /* |
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| 402 | *************** |
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| 403 | * BOILERPLATE * |
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| 404 | *************** |
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| 405 | */ |
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| 406 | |
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| 407 | /* console_initialize |
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[3235ad9] | 408 | * |
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[aecfa2b] | 409 | * This routine initializes the console IO driver. |
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[3235ad9] | 410 | * |
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[aecfa2b] | 411 | * Input parameters: NONE |
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[3235ad9] | 412 | * |
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| 413 | * Output parameters: NONE |
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[aecfa2b] | 414 | * |
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| 415 | * Return values: |
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[3235ad9] | 416 | */ |
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| 417 | |
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[aecfa2b] | 418 | rtems_device_driver console_initialize( |
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| 419 | rtems_device_major_number major, |
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| 420 | rtems_device_minor_number minor, |
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| 421 | void *arg |
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[3235ad9] | 422 | ) |
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| 423 | { |
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[aecfa2b] | 424 | rtems_status_code status; |
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[3235ad9] | 425 | |
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[aecfa2b] | 426 | /* |
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| 427 | * Set up TERMIOS |
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| 428 | */ |
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| 429 | rtems_termios_initialize (); |
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[3235ad9] | 430 | |
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[aecfa2b] | 431 | /* |
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| 432 | * Do device-specific initialization |
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| 433 | */ |
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| 434 | spiInitialize (); |
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[3235ad9] | 435 | |
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[aecfa2b] | 436 | /* |
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| 437 | * Register the device |
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| 438 | */ |
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| 439 | status = rtems_io_register_name ("/dev/console", major, 0); |
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| 440 | if (status != RTEMS_SUCCESSFUL) |
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| 441 | rtems_fatal_error_occurred (status); |
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| 442 | return RTEMS_SUCCESSFUL; |
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[3235ad9] | 443 | } |
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| 444 | |
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[aecfa2b] | 445 | |
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[3235ad9] | 446 | /* |
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[3a4ae6c] | 447 | * Open entry point |
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[3235ad9] | 448 | */ |
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[3a4ae6c] | 449 | |
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| 450 | rtems_device_driver console_open( |
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| 451 | rtems_device_major_number major, |
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| 452 | rtems_device_minor_number minor, |
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| 453 | void * arg |
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[3235ad9] | 454 | ) |
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| 455 | { |
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[aecfa2b] | 456 | rtems_status_code sc; |
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| 457 | static const rtems_termios_callbacks intrCallbacks = { |
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| 458 | NULL, /* firstOpen */ |
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| 459 | NULL, /* lastClose */ |
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| 460 | NULL, /* pollRead */ |
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| 461 | spiInterruptWrite, /* write */ |
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| 462 | spiSetAttributes, /* setAttributes */ |
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| 463 | spiStopRemoteTx, /* stopRemoteTx */ |
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| 464 | spiStartRemoteTx, /* startRemoteTx */ |
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| 465 | 1 /* outputUsesInterrupts */ |
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| 466 | }; |
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| 467 | |
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| 468 | static const rtems_termios_callbacks pollCallbacks = { |
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| 469 | NULL, /* firstOpen */ |
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| 470 | NULL, /* lastClose */ |
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| 471 | spiPollRead, /* pollRead */ |
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| 472 | spiPollWrite, /* write */ |
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| 473 | spiSetAttributes, /* setAttributes */ |
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| 474 | spiStopRemoteTx, /* stopRemoteTx */ |
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| 475 | spiStartRemoteTx, /* startRemoteTx */ |
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| 476 | 0 /* outputUsesInterrupts */ |
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| 477 | }; |
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| 478 | |
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| 479 | if (ppc403_spi_interrupt) { |
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| 480 | rtems_libio_open_close_args_t *args = arg; |
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| 481 | |
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| 482 | sc = rtems_termios_open (major, minor, arg, &intrCallbacks); |
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| 483 | spittyp = args->iop->data1; |
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| 484 | } |
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| 485 | else { |
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| 486 | sc = rtems_termios_open (major, minor, arg, &pollCallbacks); |
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| 487 | } |
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| 488 | return sc; |
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[3a4ae6c] | 489 | } |
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| 490 | |
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| 491 | /* |
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| 492 | * Close entry point |
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| 493 | */ |
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| 494 | |
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| 495 | rtems_device_driver console_close( |
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| 496 | rtems_device_major_number major, |
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| 497 | rtems_device_minor_number minor, |
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| 498 | void * arg |
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| 499 | ) |
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| 500 | { |
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[aecfa2b] | 501 | return rtems_termios_close (arg); |
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[3a4ae6c] | 502 | } |
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| 503 | |
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| 504 | /* |
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| 505 | * read bytes from the serial port. We only have stdin. |
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| 506 | */ |
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| 507 | |
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| 508 | rtems_device_driver console_read( |
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| 509 | rtems_device_major_number major, |
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| 510 | rtems_device_minor_number minor, |
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| 511 | void * arg |
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| 512 | ) |
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| 513 | { |
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[aecfa2b] | 514 | return rtems_termios_read (arg); |
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[3235ad9] | 515 | } |
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[3a4ae6c] | 516 | |
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[3235ad9] | 517 | /* |
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[3a4ae6c] | 518 | * write bytes to the serial port. Stdout and stderr are the same. |
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[3235ad9] | 519 | */ |
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[3a4ae6c] | 520 | |
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| 521 | rtems_device_driver console_write( |
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| 522 | rtems_device_major_number major, |
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| 523 | rtems_device_minor_number minor, |
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| 524 | void * arg |
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[3235ad9] | 525 | ) |
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| 526 | { |
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[aecfa2b] | 527 | return rtems_termios_write (arg); |
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[3a4ae6c] | 528 | } |
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| 529 | |
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| 530 | /* |
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| 531 | * IO Control entry point |
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| 532 | */ |
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| 533 | |
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| 534 | rtems_device_driver console_control( |
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| 535 | rtems_device_major_number major, |
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| 536 | rtems_device_minor_number minor, |
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| 537 | void * arg |
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| 538 | ) |
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| 539 | { |
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[aecfa2b] | 540 | return rtems_termios_ioctl (arg); |
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[3235ad9] | 541 | } |
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[3a4ae6c] | 542 | |
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