1 | /* |
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2 | * This file contains the PowerPC 403GA console IO package. |
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3 | * |
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4 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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5 | * |
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6 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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7 | * |
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8 | * To anyone who acknowledges that this file is provided "AS IS" |
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9 | * without any express or implied warranty: |
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10 | * permission to use, copy, modify, and distribute this file |
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11 | * for any purpose is hereby granted without fee, provided that |
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12 | * the above copyright notice and this notice appears in all |
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13 | * copies, and that the name of i-cubed limited not be used in |
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14 | * advertising or publicity pertaining to distribution of the |
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15 | * software without specific, written prior permission. |
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16 | * i-cubed limited makes no representations about the suitability |
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17 | * of this software for any purpose. |
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18 | * |
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19 | * Derived from c/src/lib/libbsp/no_cpu/no_bsp/console/console.c: |
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20 | * |
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21 | * COPYRIGHT (c) 1989-1998. |
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22 | * On-Line Applications Research Corporation (OAR). |
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23 | * Copyright assigned to U.S. Government, 1994. |
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24 | * |
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25 | * The license and distribution terms for this file may be |
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26 | * found in the file LICENSE in this distribution or at |
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27 | * http://www.OARcorp.com/rtems/license.html. |
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28 | * |
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29 | * $Id$ |
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30 | */ |
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31 | |
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32 | #define NO_BSP_INIT |
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33 | |
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34 | #include <rtems.h> |
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35 | #include <rtems/libio.h> |
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36 | |
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37 | struct async { |
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38 | /*-----------------------------------------------------------------------------+ |
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39 | | Line Status Register. |
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40 | +-----------------------------------------------------------------------------*/ |
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41 | unsigned char SPLS; |
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42 | unsigned char SPLSset; |
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43 | #define LSRDataReady 0x80 |
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44 | #define LSRFramingError 0x40 |
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45 | #define LSROverrunError 0x20 |
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46 | #define LSRParityError 0x10 |
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47 | #define LSRBreakInterrupt 0x08 |
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48 | #define LSRTxHoldEmpty 0x04 |
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49 | #define LSRTxShiftEmpty 0x02 |
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50 | |
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51 | /*-----------------------------------------------------------------------------+ |
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52 | | Handshake Status Register. |
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53 | +-----------------------------------------------------------------------------*/ |
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54 | unsigned char SPHS; |
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55 | unsigned char SPHSset; |
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56 | #define HSRDsr 0x80 |
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57 | #define HSRCts 0x40 |
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58 | |
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59 | /*-----------------------------------------------------------------------------+ |
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60 | | Baud rate divisor registers |
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61 | +-----------------------------------------------------------------------------*/ |
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62 | unsigned char BRDH; |
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63 | unsigned char BRDL; |
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64 | |
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65 | /*-----------------------------------------------------------------------------+ |
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66 | | Control Register. |
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67 | +-----------------------------------------------------------------------------*/ |
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68 | unsigned char SPCTL; |
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69 | #define CRNormal 0x00 |
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70 | #define CRLoopback 0x40 |
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71 | #define CRAutoEcho 0x80 |
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72 | #define CRDtr 0x20 |
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73 | #define CRRts 0x10 |
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74 | #define CRWordLength7 0x00 |
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75 | #define CRWordLength8 0x08 |
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76 | #define CRParityDisable 0x00 |
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77 | #define CRParityEnable 0x04 |
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78 | #define CREvenParity 0x00 |
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79 | #define CROddParity 0x02 |
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80 | #define CRStopBitsOne 0x00 |
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81 | #define CRStopBitsTwo 0x01 |
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82 | #define CRDisableDtrRts 0x00 |
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83 | |
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84 | /*-----------------------------------------------------------------------------+ |
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85 | | Receiver Command Register. |
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86 | +-----------------------------------------------------------------------------*/ |
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87 | unsigned char SPRC; |
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88 | #define RCRDisable 0x00 |
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89 | #define RCREnable 0x80 |
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90 | #define RCRIntDisable 0x00 |
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91 | #define RCRIntEnabled 0x20 |
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92 | #define RCRDMACh2 0x40 |
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93 | #define RCRDMACh3 0x60 |
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94 | #define RCRErrorInt 0x10 |
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95 | #define RCRPauseEnable 0x08 |
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96 | |
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97 | /*-----------------------------------------------------------------------------+ |
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98 | | Transmitter Command Register. |
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99 | +-----------------------------------------------------------------------------*/ |
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100 | unsigned char SPTC; |
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101 | #define TCRDisable 0x00 |
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102 | #define TCREnable 0x80 |
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103 | #define TCRIntDisable 0x00 |
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104 | #define TCRIntEnabled 0x20 |
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105 | #define TCRDMACh2 0x40 |
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106 | #define TCRDMACh3 0x60 |
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107 | #define TCRTxEmpty 0x10 |
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108 | #define TCRErrorInt 0x08 |
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109 | #define TCRStopPause 0x04 |
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110 | #define TCRBreakGen 0x02 |
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111 | |
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112 | /*-----------------------------------------------------------------------------+ |
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113 | | Miscellanies defines. |
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114 | +-----------------------------------------------------------------------------*/ |
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115 | unsigned char SPTB; |
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116 | #define SPRB SPTB |
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117 | }; |
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118 | |
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119 | #define XOFFchar 0x13 |
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120 | #define XONchar 0x11 |
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121 | |
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122 | typedef volatile struct async *pasync; |
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123 | static const pasync port = (pasync)0x40000000; |
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124 | |
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125 | /* console_initialize |
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126 | * |
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127 | * This routine initializes the console IO driver. |
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128 | * |
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129 | * Input parameters: NONE |
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130 | * |
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131 | * Output parameters: NONE |
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132 | * |
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133 | * Return values: |
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134 | */ |
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135 | |
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136 | rtems_device_driver console_initialize( |
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137 | rtems_device_major_number major, |
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138 | rtems_device_minor_number minor, |
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139 | void *arg |
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140 | ) |
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141 | { |
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142 | rtems_status_code status; |
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143 | register unsigned tmp; |
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144 | |
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145 | /* Initialise the serial port */ |
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146 | asm volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */ |
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147 | tmp &= ~3; |
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148 | tmp |= (rtems_cpu_configuration_get_serial_external_clock() ? 2 : 0) | |
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149 | (rtems_cpu_configuration_get_serial_cts_rts() ? 1 : 0); |
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150 | asm volatile ("mtdcr 0xa0, %0" : "=r" (tmp) : "0" (tmp)); /* IOCR */ |
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151 | port->SPLS = (LSRDataReady | LSRFramingError | LSROverrunError | |
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152 | LSRParityError | LSRBreakInterrupt); |
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153 | tmp = rtems_cpu_configuration_get_serial_per_sec() / |
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154 | rtems_cpu_configuration_get_serial_rate(); |
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155 | #if 0 /* replaced by IMD... */ |
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156 | tmp = ((tmp + 8) >> 4) - 1; |
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157 | port->BRDL = tmp & 0x255; |
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158 | port->BRDH = tmp >> 8; |
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159 | #else |
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160 | tmp = ((tmp) >> 4) - 1; |
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161 | port->BRDL = tmp & 0xff; |
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162 | port->BRDH = tmp >> 8; |
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163 | #endif |
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164 | port->SPCTL = (CRNormal | CRDtr | CRRts | CRWordLength8 | CRParityDisable | |
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165 | CRStopBitsOne); |
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166 | port->SPRC = (RCREnable | RCRIntDisable | RCRPauseEnable); |
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167 | port->SPTC = (TCREnable | TCRIntDisable); |
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168 | port->SPHS = (HSRDsr | HSRCts); |
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169 | |
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170 | status = rtems_io_register_name( |
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171 | "/dev/console", |
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172 | major, |
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173 | (rtems_device_minor_number) 0 |
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174 | ); |
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175 | |
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176 | if (status != RTEMS_SUCCESSFUL) |
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177 | rtems_fatal_error_occurred(status); |
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178 | |
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179 | return RTEMS_SUCCESSFUL; |
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180 | } |
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181 | |
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182 | |
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183 | /* is_character_ready |
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184 | * |
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185 | * This routine returns TRUE if a character is available. |
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186 | * |
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187 | * Input parameters: NONE |
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188 | * |
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189 | * Output parameters: NONE |
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190 | * |
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191 | * Return values: |
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192 | */ |
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193 | |
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194 | rtems_boolean is_character_ready( |
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195 | char *ch |
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196 | ) |
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197 | { |
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198 | unsigned char status; |
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199 | |
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200 | if ((status = port->SPLS) & LSRDataReady) |
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201 | { |
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202 | *ch = port->SPRB; |
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203 | return(TRUE); |
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204 | } |
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205 | |
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206 | /* Clean any dodgy status */ |
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207 | if ((status & (LSRFramingError | LSROverrunError | LSRParityError | |
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208 | LSRBreakInterrupt)) != 0) |
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209 | { |
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210 | port->SPLS = (LSRFramingError | LSROverrunError | LSRParityError | |
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211 | LSRBreakInterrupt); |
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212 | } |
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213 | |
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214 | return FALSE; |
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215 | } |
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216 | |
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217 | /* inbyte |
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218 | * |
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219 | * This routine reads a character from the SOURCE. |
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220 | * |
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221 | * Input parameters: NONE |
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222 | * |
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223 | * Output parameters: NONE |
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224 | * |
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225 | * Return values: |
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226 | * character read from SOURCE |
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227 | */ |
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228 | |
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229 | char inbyte( void ) |
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230 | { |
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231 | unsigned char status; |
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232 | |
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233 | while (1) |
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234 | { |
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235 | if ((status = port->SPLS) & LSRDataReady) |
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236 | break; |
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237 | |
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238 | /* Clean any dodgy status */ |
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239 | if ((status & (LSRFramingError | LSROverrunError | LSRParityError | |
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240 | LSRBreakInterrupt)) != 0) |
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241 | { |
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242 | port->SPLS = (LSRFramingError | LSROverrunError | LSRParityError | |
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243 | LSRBreakInterrupt); |
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244 | } |
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245 | } |
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246 | |
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247 | return port->SPRB; |
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248 | } |
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249 | |
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250 | /* outbyte |
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251 | * |
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252 | * This routine transmits a character out the SOURCE. It may support |
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253 | * XON/XOFF flow control. |
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254 | * |
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255 | * Input parameters: |
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256 | * ch - character to be transmitted |
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257 | * |
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258 | * Output parameters: NONE |
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259 | */ |
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260 | |
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261 | void outbyte( |
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262 | char ch |
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263 | ) |
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264 | { |
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265 | unsigned char status; |
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266 | |
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267 | while (port->SPHS) |
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268 | port->SPHS = (HSRDsr | HSRCts); |
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269 | |
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270 | while (1) |
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271 | { |
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272 | status = port->SPLS; |
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273 | |
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274 | if (port->SPHS) |
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275 | port->SPHS = (HSRDsr | HSRCts); |
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276 | else if (status & LSRTxHoldEmpty) |
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277 | break; |
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278 | } |
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279 | |
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280 | if (rtems_cpu_configuration_get_serial_xon_xoff()) |
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281 | while (is_character_ready(&status)) |
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282 | { |
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283 | if (status == XOFFchar) |
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284 | do { |
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285 | while (!is_character_ready(&status)); |
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286 | } while (status != XONchar); |
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287 | } |
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288 | |
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289 | port->SPTB = ch; |
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290 | } |
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291 | |
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292 | /* |
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293 | * Open entry point |
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294 | */ |
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295 | |
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296 | rtems_device_driver console_open( |
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297 | rtems_device_major_number major, |
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298 | rtems_device_minor_number minor, |
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299 | void * arg |
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300 | ) |
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301 | { |
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302 | return RTEMS_SUCCESSFUL; |
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303 | } |
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304 | |
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305 | /* |
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306 | * Close entry point |
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307 | */ |
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308 | |
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309 | rtems_device_driver console_close( |
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310 | rtems_device_major_number major, |
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311 | rtems_device_minor_number minor, |
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312 | void * arg |
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313 | ) |
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314 | { |
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315 | return RTEMS_SUCCESSFUL; |
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316 | } |
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317 | |
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318 | /* |
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319 | * read bytes from the serial port. We only have stdin. |
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320 | */ |
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321 | |
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322 | rtems_device_driver console_read( |
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323 | rtems_device_major_number major, |
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324 | rtems_device_minor_number minor, |
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325 | void * arg |
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326 | ) |
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327 | { |
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328 | rtems_libio_rw_args_t *rw_args; |
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329 | char *buffer; |
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330 | int maximum; |
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331 | int count = 0; |
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332 | |
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333 | rw_args = (rtems_libio_rw_args_t *) arg; |
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334 | |
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335 | buffer = rw_args->buffer; |
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336 | maximum = rw_args->count; |
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337 | |
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338 | for (count = 0; count < maximum; count++) { |
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339 | buffer[ count ] = inbyte(); |
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340 | if (buffer[ count ] == '\n' || buffer[ count ] == '\r') { |
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341 | buffer[ count++ ] = '\n'; |
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342 | buffer[ count ] = 0; |
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343 | break; |
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344 | } |
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345 | } |
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346 | |
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347 | rw_args->bytes_moved = count; |
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348 | return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED; |
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349 | } |
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350 | |
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351 | /* |
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352 | * write bytes to the serial port. Stdout and stderr are the same. |
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353 | */ |
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354 | |
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355 | rtems_device_driver console_write( |
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356 | rtems_device_major_number major, |
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357 | rtems_device_minor_number minor, |
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358 | void * arg |
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359 | ) |
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360 | { |
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361 | int count; |
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362 | int maximum; |
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363 | rtems_libio_rw_args_t *rw_args; |
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364 | char *buffer; |
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365 | |
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366 | rw_args = (rtems_libio_rw_args_t *) arg; |
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367 | |
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368 | buffer = rw_args->buffer; |
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369 | maximum = rw_args->count; |
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370 | |
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371 | for (count = 0; count < maximum; count++) { |
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372 | if ( buffer[ count ] == '\n') { |
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373 | outbyte('\r'); |
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374 | } |
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375 | outbyte( buffer[ count ] ); |
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376 | } |
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377 | return maximum; |
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378 | } |
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379 | |
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380 | /* |
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381 | * IO Control entry point |
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382 | */ |
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383 | |
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384 | rtems_device_driver console_control( |
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385 | rtems_device_major_number major, |
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386 | rtems_device_minor_number minor, |
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387 | void * arg |
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388 | ) |
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389 | { |
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390 | return RTEMS_SUCCESSFUL; |
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391 | } |
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392 | |
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