source: rtems/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c @ e57b0e2

4.104.114.84.95
Last change on this file since e57b0e2 was e57b0e2, checked in by Joel Sherrill <joel.sherrill@…>, on Dec 5, 1995 at 7:23:05 PM

update from Andy Bray <andy@…>

  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  clock.c
2 *
3 *  This routine initializes the interval timer on the
4 *  PowerPC 403 CPU.  The tick frequency is specified by the bsp.
5 *
6 *  Author: Andrew Bray <andy@i-cubed.co.uk>
7 *
8 *  COPYRIGHT (c) 1995 by i-cubed ltd.
9 *
10 *  To anyone who acknowledges that this file is provided "AS IS"
11 *  without any express or implied warranty:
12 *      permission to use, copy, modify, and distribute this file
13 *      for any purpose is hereby granted without fee, provided that
14 *      the above copyright notice and this notice appears in all
15 *      copies, and that the name of i-cubed limited not be used in
16 *      advertising or publicity pertaining to distribution of the
17 *      software without specific, written prior permission.
18 *      i-cubed limited makes no representations about the suitability
19 *      of this software for any purpose.
20 *
21 *  Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c:
22 *
23 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
24 *  On-Line Applications Research Corporation (OAR).
25 *  All rights assigned to U.S. Government, 1994.
26 *
27 *  This material may be reproduced by or for the U.S. Government pursuant
28 *  to the copyright license under the clause at DFARS 252.227-7013.  This
29 *  notice must appear in all copies of this file and its derivatives.
30 *
31 *  $Id$
32 */
33
34#include <bsp.h>
35#include <clockdrv.h>
36#include <rtems/libio.h>
37
38#include <stdlib.h>                     /* for atexit() */
39
40extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
41
42volatile rtems_unsigned32 Clock_driver_ticks;
43static rtems_unsigned32 pit_value, tick_time;
44static rtems_boolean auto_restart;
45
46void Clock_exit( void );
47 
48/*
49 * These are set by clock driver during its init
50 */
51 
52rtems_device_major_number rtems_clock_major = ~0;
53rtems_device_minor_number rtems_clock_minor;
54 
55static INLINE rtems_unsigned32 get_itimer(void)
56{
57    register rtems_unsigned32 rc;
58
59    asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
60
61    return rc;
62}
63
64/*
65 *  ISR Handler
66 */
67 
68rtems_isr
69Clock_isr(rtems_vector_number vector)
70{
71    if (!auto_restart)
72    {
73      rtems_unsigned32 clicks_til_next_interrupt;
74      rtems_unsigned32 itimer_value;
75 
76      /*
77       * setup for next interrupt; making sure the new value is reasonably
78       * in the future.... in case we lost out on an interrupt somehow
79       */
80 
81      itimer_value = get_itimer();
82      tick_time += pit_value;
83 
84      /*
85       * how far away is next interrupt *really*
86       * It may be a long time; this subtraction works even if
87       * Clock_clicks_interrupt < Clock_clicks_low_order via
88       * the miracle of unsigned math.
89       */
90      clicks_til_next_interrupt = tick_time - itimer_value;
91 
92      /*
93       * If it is too soon then bump it up.
94       * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
95       * But setting it low is useful for debug, so...
96       */
97 
98      if (clicks_til_next_interrupt < 400)
99      {
100        tick_time = itimer_value + 1000;
101        clicks_til_next_interrupt = 1000;
102        /* XXX: count these! this should be rare */
103      }
104 
105      /*
106       * If it is too late, that means we missed the interrupt somehow.
107       * Rather than wait 35-50s for a wrap, we just fudge it here.
108       */
109 
110      if (clicks_til_next_interrupt > pit_value)
111      {
112        tick_time = itimer_value + 1000;
113        clicks_til_next_interrupt = 1000;
114        /* XXX: count these! this should never happen :-) */
115      }
116 
117      asm volatile ("mtspr 0x3db, %0" :: "r" 
118                         (clicks_til_next_interrupt)); /* PIT */
119  }
120 
121    asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
122 
123    Clock_driver_ticks++;
124 
125    rtems_clock_tick();
126}
127
128void Install_clock(rtems_isr_entry clock_isr)
129{
130    rtems_isr_entry previous_isr;
131    rtems_unsigned32 pvr, iocr;
132 
133    Clock_driver_ticks = 0;
134 
135    asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
136    iocr &= ~4;
137    iocr |= 4;  /* Select external timer clock */
138    asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
139 
140    asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
141 
142    if (((pvr & 0xffff0000) >> 16) != 0x0020)
143      return; /* Not a ppc403 */
144 
145    if ((pvr & 0xff00) == 0x0000) /* 403GA */
146      auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0;
147    else if ((pvr & 0xff00) == 0x0100) /* 403GB */
148      auto_restart = 1;
149 
150    pit_value = BSP_Configuration.microseconds_per_tick *
151      Cpu_table.clicks_per_usec;
152 
153    if (BSP_Configuration.ticks_per_timeslice)
154    {
155      register rtems_unsigned32 tcr;
156
157        /*
158         * initialize the interval here
159         * First tick is set to right amount of time in the future
160         * Future ticks will be incremented over last value set
161         * in order to provide consistent clicks in the face of
162         * interrupt overhead
163         */
164 
165      rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
166 
167      asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
168 
169      asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
170 
171      tcr &= ~ 0x04400000;
172 
173      tcr |= (auto_restart ? 0x04400000 : 0x04000000);
174 
175      tick_time = get_itimer() + pit_value;
176 
177      asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
178    }
179    atexit(Clock_exit);
180}
181
182void
183ReInstall_clock(rtems_isr_entry new_clock_isr)
184{
185    rtems_isr_entry previous_isr;
186    rtems_unsigned32 isrlevel = 0;
187
188    rtems_interrupt_disable(isrlevel);
189   
190    rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr);
191
192    rtems_interrupt_enable(isrlevel);
193}
194
195
196/*
197 * Called via atexit()
198 * Remove the clock interrupt handler by setting handler to NULL
199 */
200
201void
202Clock_exit(void)
203{
204    if ( BSP_Configuration.ticks_per_timeslice )
205    {
206      register rtems_unsigned32 tcr;
207 
208      asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
209 
210      tcr &= ~ 0x04400000;
211 
212      asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
213 
214      (void) set_vector(0, PPC_IRQ_PIT, 1);
215    }
216
217}
218
219rtems_device_driver Clock_initialize(
220  rtems_device_major_number major,
221  rtems_device_minor_number minor,
222  void *pargp
223)
224{
225  Install_clock( Clock_isr );
226 
227  /*
228   * make major/minor avail to others such as shared memory driver
229   */
230 
231  rtems_clock_major = major;
232  rtems_clock_minor = minor;
233 
234  return RTEMS_SUCCESSFUL;
235}
236 
237rtems_device_driver Clock_control(
238  rtems_device_major_number major,
239  rtems_device_minor_number minor,
240  void *pargp
241)
242{
243    rtems_libio_ioctl_args_t *args = pargp;
244 
245    if (args == 0)
246        goto done;
247 
248    /*
249     * This is hokey, but until we get a defined interface
250     * to do this, it will just be this simple...
251     */
252 
253    if (args->command == rtems_build_name('I', 'S', 'R', ' '))
254    {
255        Clock_isr(PPC_IRQ_PIT);
256    }
257    else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
258    {
259        ReInstall_clock(args->buffer);
260    }
261 
262done:
263    return RTEMS_SUCCESSFUL;
264}
265
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