source: rtems/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c @ e1df032

4.104.114.9
Last change on this file since e1df032 was e1df032, checked in by Till Straumann <strauman@…>, on Jul 10, 2008 at 9:51:55 PM

2008-07-10 Till Straumann <strauman@…>

  • ChangeLog?, mpc8xx/clock/clock.c, ppc403/clock/clock.c, ppc403/irq/ictrl.h, rtems/powerpc/powerpc.h: Removed all macro definitions which depended on the compiler defining a PPC CPU-model dependent symbol from files in cpukit. Macros which were not used by cpukit have been moved to libcpu/powerpc/rtems/powerpc/powerpc.h.
  • Property mode set to 100644
File size: 10.8 KB
Line 
1/*  clock.c
2 *
3 *  This routine initializes the interval timer on the
4 *  PowerPC 403 CPU.  The tick frequency is specified by the bsp.
5 *
6 *  Author: Andrew Bray <andy@i-cubed.co.uk>
7 *
8 *  COPYRIGHT (c) 1995 by i-cubed ltd.
9 *
10 *  To anyone who acknowledges that this file is provided "AS IS"
11 *  without any express or implied warranty:
12 *      permission to use, copy, modify, and distribute this file
13 *      for any purpose is hereby granted without fee, provided that
14 *      the above copyright notice and this notice appears in all
15 *      copies, and that the name of i-cubed limited not be used in
16 *      advertising or publicity pertaining to distribution of the
17 *      software without specific, written prior permission.
18 *      i-cubed limited makes no representations about the suitability
19 *      of this software for any purpose.
20 *
21 *  Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c:
22 *
23 *  Modifications for deriving timer clock from cpu system clock by
24 *              Thomas Doerfler <td@imd.m.isar.de>
25 *  for these modifications:
26 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
27 *
28 *  COPYRIGHT (c) 1989-2007.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.rtems.com/license/LICENSE.
34 *
35 *  Modifications for PPC405GP by Dennis Ehlin
36 *
37 *  $Id$
38 */
39
40#include <rtems.h>
41#include <rtems/clockdrv.h>
42#include <rtems/libio.h>
43#include <stdlib.h>                     /* for atexit() */
44#include <rtems/bspIo.h>
45#include <rtems/powerpc/powerpc.h>
46/*
47 * check, which exception handling code is present
48 */
49#if !defined(ppc405)
50#define PPC_HAS_CLASSIC_EXCEPTIONS TRUE
51#else
52#define PPC_HAS_CLASSIC_EXCEPTIONS FALSE
53#include <bsp/irq.h>
54#endif
55
56volatile uint32_t   Clock_driver_ticks;
57static uint32_t   pit_value, tick_time;
58static rtems_boolean auto_restart;
59
60void Clock_exit( void );
61 
62rtems_isr_entry set_vector(                    /* returns old vector */
63  rtems_isr_entry     handler,                  /* isr routine        */
64  rtems_vector_number vector,                   /* vector number      */
65  int                 type                      /* RTEMS or RAW intr  */
66);
67
68/*
69 * These are set by clock driver during its init
70 */
71 
72rtems_device_major_number rtems_clock_major = ~0;
73rtems_device_minor_number rtems_clock_minor;
74 
75static inline uint32_t   get_itimer(void)
76{
77    register uint32_t   rc;
78
79#ifndef ppc405 /* this is a ppc403 */
80    asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
81#else /* ppc405 */
82    asm volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
83#endif /* ppc405 */
84
85    return rc;
86}
87
88/*
89 *  ISR Handler
90 */
91
92#if PPC_HAS_CLASSIC_EXCEPTIONS
93rtems_isr Clock_isr(rtems_vector_number vector)
94#else
95void Clock_isr(void* handle)
96#endif
97{
98    uint32_t   clicks_til_next_interrupt;
99    if (!auto_restart)
100    {
101      uint32_t   itimer_value;
102      /*
103       * setup for next interrupt; making sure the new value is reasonably
104       * in the future.... in case we lost out on an interrupt somehow
105       */
106 
107      itimer_value = get_itimer();
108      tick_time += pit_value;
109 
110      /*
111       * how far away is next interrupt *really*
112       * It may be a long time; this subtraction works even if
113       * Clock_clicks_interrupt < Clock_clicks_low_order via
114       * the miracle of unsigned math.
115       */
116      clicks_til_next_interrupt = tick_time - itimer_value;
117 
118      /*
119       * If it is too soon then bump it up.
120       * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
121       * But setting it low is useful for debug, so...
122       */
123 
124      if (clicks_til_next_interrupt < 400)
125      {
126        tick_time = itimer_value + 1000;
127        clicks_til_next_interrupt = 1000;
128        /* XXX: count these! this should be rare */
129      }
130 
131      /*
132       * If it is too late, that means we missed the interrupt somehow.
133       * Rather than wait 35-50s for a wrap, we just fudge it here.
134       */
135 
136      if (clicks_til_next_interrupt > pit_value)
137      {
138        tick_time = itimer_value + 1000;
139        clicks_til_next_interrupt = 1000;
140        /* XXX: count these! this should never happen :-) */
141      }
142 
143      asm volatile ("mtspr 0x3db, %0" :: "r" 
144                         (clicks_til_next_interrupt)); /* PIT */
145  }
146 
147    asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
148 
149    Clock_driver_ticks++;
150 
151    rtems_clock_tick();
152}
153
154#if !PPC_HAS_CLASSIC_EXCEPTIONS
155int ClockIsOn(const rtems_irq_connect_data* unused)
156{
157    register uint32_t   tcr;
158 
159    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
160 
161    return (tcr & 0x04000000) != 0;
162}
163#endif
164
165void ClockOff(
166#if PPC_HAS_CLASSIC_EXCEPTIONS
167              void
168#else
169              const rtems_irq_connect_data* unused
170#endif
171              )
172{
173    register uint32_t   tcr;
174 
175    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
176 
177    tcr &= ~ 0x04400000;
178 
179    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ 
180}
181
182void ClockOn(
183#if PPC_HAS_CLASSIC_EXCEPTIONS
184              void
185#else
186              const rtems_irq_connect_data* unused
187#endif
188              )
189{
190    uint32_t   iocr;
191    register uint32_t   tcr;
192    extern uint32_t bsp_clicks_per_usec;
193    extern boolean bsp_timer_internal_clock;
194#ifdef ppc403
195    uint32_t   pvr;
196#endif /* ppc403 */
197 
198    Clock_driver_ticks = 0;
199 
200#ifndef ppc405 /* this is a ppc403 */
201    asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
202    if (bsp_timer_internal_clock) {
203        iocr &= ~4; /* timer clocked from system clock */
204    }
205    else {
206        iocr |= 4; /* select external timer clock */
207    }
208    asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
209 
210    asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
211    if (((pvr & 0xffff0000) >> 16) != 0x0020)
212      return; /* Not a ppc403 */
213 
214    if ((pvr & 0xff00) == 0x0000) /* 403GA */
215#if 0 /* FIXME: in which processor versions will "autoload" work properly? */
216      auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0;
217#else
218    /* no known chip version supports auto restart of timer... */
219    auto_restart = 0;
220#endif
221    else if ((pvr & 0xff00) == 0x0100) /* 403GB */
222      auto_restart = 1;
223 
224#else /* ppc405 */
225    asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
226    if (bsp_timer_internal_clock) {
227        iocr &=~0x800000        ;/* timer clocked from system clock CETE*/
228    }
229    else {
230        iocr |= 0x800000; /* select external timer clock CETE*/
231    }
232    asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
233
234     /*
235      * Enable auto restart
236      */
237
238    auto_restart=1;
239
240#endif /* ppc405 */
241    pit_value = rtems_configuration_get_microseconds_per_tick() *
242      bsp_clicks_per_usec;
243 
244     /*
245      * Set PIT value
246      */
247
248    asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
249 
250     /*     
251      * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
252      * Enable PIT interrupt, bit TCR->PIE = 1     0x4000000
253      */
254    tick_time = get_itimer() + pit_value;
255
256    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ 
257    tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
258#if 1
259    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
260#endif
261
262}
263
264
265
266void Install_clock(
267#if PPC_HAS_CLASSIC_EXCEPTIONS
268                   rtems_isr_entry clock_isr
269#else
270                   void (*clock_isr)(void *)
271#endif
272                   )
273{
274#ifdef ppc403
275    uint32_t   pvr;
276#endif /* ppc403 */
277 
278    Clock_driver_ticks = 0;
279 
280    /*
281     * initialize the interval here
282     * First tick is set to right amount of time in the future
283     * Future ticks will be incremented over last value set
284     * in order to provide consistent clicks in the face of
285     * interrupt overhead
286     */
287
288#if PPC_HAS_CLASSIC_EXCEPTIONS
289 {
290    rtems_isr_entry previous_isr;
291    rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
292    ClockOn();
293 }
294#else
295 {
296   rtems_irq_connect_data clockIrqConnData;
297   clockIrqConnData.on   = ClockOn;
298   clockIrqConnData.off  = ClockOff;
299   clockIrqConnData.isOn = ClockIsOn;
300   clockIrqConnData.name = BSP_PIT;
301   clockIrqConnData.hdl  = clock_isr;
302   if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
303     printk("Unable to connect Clock Irq handler\n");
304     rtems_fatal_error_occurred(1);
305   }
306 }
307#endif
308    atexit(Clock_exit);
309}
310
311void
312ReInstall_clock(
313#if PPC_HAS_CLASSIC_EXCEPTIONS
314                rtems_isr_entry new_clock_isr
315#else
316                void (*new_clock_isr)(void *)
317#endif
318)
319{
320  uint32_t   isrlevel = 0;
321 
322  rtems_interrupt_disable(isrlevel);
323 
324#if PPC_HAS_CLASSIC_EXCEPTIONS
325 {
326   rtems_isr_entry previous_isr;
327   rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr);
328   ClockOn();
329 }
330#else
331  {
332    rtems_irq_connect_data clockIrqConnData;
333   
334    clockIrqConnData.name = BSP_PIT;
335    if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
336      printk("Unable to stop system clock\n");
337      rtems_fatal_error_occurred(1);
338    }
339   
340    BSP_remove_rtems_irq_handler (&clockIrqConnData);
341   
342    clockIrqConnData.on   = ClockOn;
343    clockIrqConnData.off  = ClockOff;
344    clockIrqConnData.isOn = ClockIsOn;
345    clockIrqConnData.name = BSP_PIT;
346    clockIrqConnData.hdl  = new_clock_isr;
347
348    if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
349      printk("Unable to connect Clock Irq handler\n");
350      rtems_fatal_error_occurred(1);
351    }
352  }
353#endif
354
355  rtems_interrupt_enable(isrlevel);
356}
357
358
359/*
360 * Called via atexit()
361 * Remove the clock interrupt handler by setting handler to NULL
362 *
363 * This will not work on the 405GP because
364 * when bit's are set in TCR they can only be unset by a reset
365 */
366
367void Clock_exit(void)
368{
369#if PPC_HAS_CLASSIC_EXCEPTIONS
370  ClockOff();
371 
372  (void) set_vector(0, PPC_IRQ_PIT, 1);
373#else
374 {
375    rtems_irq_connect_data clockIrqConnData;
376   
377    clockIrqConnData.name = BSP_PIT;
378    if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
379      printk("Unable to stop system clock\n");
380      rtems_fatal_error_occurred(1);
381    }
382   
383    BSP_remove_rtems_irq_handler (&clockIrqConnData);
384 }
385#endif
386}
387
388rtems_device_driver Clock_initialize(
389  rtems_device_major_number major,
390  rtems_device_minor_number minor,
391  void *pargp
392)
393{
394  Install_clock( Clock_isr );
395 
396  /*
397   * make major/minor avail to others such as shared memory driver
398   */
399 
400  rtems_clock_major = major;
401  rtems_clock_minor = minor;
402 
403  return RTEMS_SUCCESSFUL;
404}
405 
406rtems_device_driver Clock_control(
407  rtems_device_major_number major,
408  rtems_device_minor_number minor,
409  void *pargp
410)
411{
412    rtems_libio_ioctl_args_t *args = pargp;
413 
414    if (args == 0)
415        goto done;
416 
417    /*
418     * This is hokey, but until we get a defined interface
419     * to do this, it will just be this simple...
420     */
421 
422    if (args->command == rtems_build_name('I', 'S', 'R', ' '))
423    {
424#if PPC_HAS_CLASSIC_EXCEPTIONS
425        Clock_isr(PPC_IRQ_PIT);
426#else
427        Clock_isr(NULL);
428#endif
429    }
430    else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
431    {
432        ReInstall_clock(args->buffer);
433    }
434 
435done:
436    return RTEMS_SUCCESSFUL;
437}
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