source: rtems/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c @ 9532e55

4.104.114.84.9
Last change on this file since 9532e55 was 73b5bd5d, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 15, 2004 at 1:33:58 PM

Remove stray white spaces.

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File size: 8.2 KB
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1/*  clock.c
2 *
3 *  This routine initializes the interval timer on the
4 *  PowerPC 403 CPU.  The tick frequency is specified by the bsp.
5 *
6 *  Author: Andrew Bray <andy@i-cubed.co.uk>
7 *
8 *  COPYRIGHT (c) 1995 by i-cubed ltd.
9 *
10 *  To anyone who acknowledges that this file is provided "AS IS"
11 *  without any express or implied warranty:
12 *      permission to use, copy, modify, and distribute this file
13 *      for any purpose is hereby granted without fee, provided that
14 *      the above copyright notice and this notice appears in all
15 *      copies, and that the name of i-cubed limited not be used in
16 *      advertising or publicity pertaining to distribution of the
17 *      software without specific, written prior permission.
18 *      i-cubed limited makes no representations about the suitability
19 *      of this software for any purpose.
20 *
21 *  Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c:
22 *
23 *  Modifications for deriving timer clock from cpu system clock by
24 *              Thomas Doerfler <td@imd.m.isar.de>
25 *  for these modifications:
26 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
27 *
28 *  COPYRIGHT (c) 1989-1999.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.rtems.com/license/LICENSE.
34 *
35 *  Modifications for PPC405GP by Dennis Ehlin
36 *
37 *  $Id$
38 */
39
40#include <rtems.h>
41#include <rtems/clockdrv.h>
42#include <rtems/libio.h>
43
44#include <stdlib.h>                     /* for atexit() */
45
46volatile uint32_t   Clock_driver_ticks;
47static uint32_t   pit_value, tick_time;
48static rtems_boolean auto_restart;
49
50void Clock_exit( void );
51 
52rtems_isr_entry set_vector(                    /* returns old vector */
53  rtems_isr_entry     handler,                  /* isr routine        */
54  rtems_vector_number vector,                   /* vector number      */
55  int                 type                      /* RTEMS or RAW intr  */
56);
57
58/*
59 * These are set by clock driver during its init
60 */
61 
62rtems_device_major_number rtems_clock_major = ~0;
63rtems_device_minor_number rtems_clock_minor;
64 
65static inline uint32_t   get_itimer(void)
66{
67    register uint32_t   rc;
68
69#ifndef ppc405 /* this is a ppc403 */
70    asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
71#else /* ppc405 */
72    asm volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
73#endif /* ppc405 */
74
75    return rc;
76}
77
78/*
79 *  ISR Handler
80 */
81 
82rtems_isr
83Clock_isr(rtems_vector_number vector)
84{
85      uint32_t   clicks_til_next_interrupt;
86    if (!auto_restart)
87    {
88      uint32_t   itimer_value;
89      /*
90       * setup for next interrupt; making sure the new value is reasonably
91       * in the future.... in case we lost out on an interrupt somehow
92       */
93 
94      itimer_value = get_itimer();
95      tick_time += pit_value;
96 
97      /*
98       * how far away is next interrupt *really*
99       * It may be a long time; this subtraction works even if
100       * Clock_clicks_interrupt < Clock_clicks_low_order via
101       * the miracle of unsigned math.
102       */
103      clicks_til_next_interrupt = tick_time - itimer_value;
104 
105      /*
106       * If it is too soon then bump it up.
107       * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
108       * But setting it low is useful for debug, so...
109       */
110 
111      if (clicks_til_next_interrupt < 400)
112      {
113        tick_time = itimer_value + 1000;
114        clicks_til_next_interrupt = 1000;
115        /* XXX: count these! this should be rare */
116      }
117 
118      /*
119       * If it is too late, that means we missed the interrupt somehow.
120       * Rather than wait 35-50s for a wrap, we just fudge it here.
121       */
122 
123      if (clicks_til_next_interrupt > pit_value)
124      {
125        tick_time = itimer_value + 1000;
126        clicks_til_next_interrupt = 1000;
127        /* XXX: count these! this should never happen :-) */
128      }
129 
130      asm volatile ("mtspr 0x3db, %0" :: "r" 
131                         (clicks_til_next_interrupt)); /* PIT */
132  }
133 
134    asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
135 
136    Clock_driver_ticks++;
137 
138    rtems_clock_tick();
139}
140
141void Install_clock(rtems_isr_entry clock_isr)
142{
143    rtems_isr_entry previous_isr;
144    uint32_t   iocr;
145    register uint32_t   tcr;
146#ifdef ppc403
147    uint32_t   pvr;
148#endif /* ppc403 */
149 
150    Clock_driver_ticks = 0;
151 
152#ifndef ppc405 /* this is a ppc403 */
153    asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
154    if (rtems_cpu_configuration_get_timer_internal_clock()) {
155        iocr &= ~4; /* timer clocked from system clock */
156    }
157    else {
158        iocr |= 4; /* select external timer clock */
159    }
160    asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
161 
162    asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
163    if (((pvr & 0xffff0000) >> 16) != 0x0020)
164      return; /* Not a ppc403 */
165 
166    if ((pvr & 0xff00) == 0x0000) /* 403GA */
167#if 0 /* FIXME: in which processor versions will "autoload" work properly? */
168      auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0;
169#else
170    /* no known chip version supports auto restart of timer... */
171    auto_restart = 0;
172#endif
173    else if ((pvr & 0xff00) == 0x0100) /* 403GB */
174      auto_restart = 1;
175 
176#else /* ppc405 */
177    asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
178    if (rtems_cpu_configuration_get_timer_internal_clock()) {
179        iocr &=~0x800000        ;/* timer clocked from system clock CETE*/
180    }
181    else {
182        iocr |= 0x800000; /* select external timer clock CETE*/
183    }
184    asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
185
186     /*
187      * Enable auto restart
188      */
189
190    auto_restart=1;
191
192#endif /* ppc405 */
193    pit_value = rtems_configuration_get_microseconds_per_tick() *
194      rtems_cpu_configuration_get_clicks_per_usec();
195 
196    /*
197     * initialize the interval here
198     * First tick is set to right amount of time in the future
199     * Future ticks will be incremented over last value set
200     * in order to provide consistent clicks in the face of
201     * interrupt overhead
202     */
203
204    rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
205
206     /*
207      * Set PIT value
208      */
209
210    asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
211 
212     /*     
213      * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
214      * Enable PIT interrupt, bit TCR->PIE = 1     0x4000000
215      */
216    tick_time = get_itimer() + pit_value;
217    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ 
218    tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
219    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
220
221    atexit(Clock_exit);
222}
223
224void
225ReInstall_clock(rtems_isr_entry new_clock_isr)
226{
227    rtems_isr_entry previous_isr;
228    uint32_t   isrlevel = 0;
229
230    rtems_interrupt_disable(isrlevel);
231   
232    rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr);
233
234    rtems_interrupt_enable(isrlevel);
235}
236
237
238/*
239 * Called via atexit()
240 * Remove the clock interrupt handler by setting handler to NULL
241 *
242 * This will not work on the 405GP because
243 * when bit's are set in TCR they can only be unset by a reset
244 */
245
246void
247Clock_exit(void)
248{
249    register uint32_t   tcr;
250 
251    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
252 
253    tcr &= ~ 0x04400000;
254 
255    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
256 
257    (void) set_vector(0, PPC_IRQ_PIT, 1);
258}
259
260rtems_device_driver Clock_initialize(
261  rtems_device_major_number major,
262  rtems_device_minor_number minor,
263  void *pargp
264)
265{
266  Install_clock( Clock_isr );
267 
268  /*
269   * make major/minor avail to others such as shared memory driver
270   */
271 
272  rtems_clock_major = major;
273  rtems_clock_minor = minor;
274 
275  return RTEMS_SUCCESSFUL;
276}
277 
278rtems_device_driver Clock_control(
279  rtems_device_major_number major,
280  rtems_device_minor_number minor,
281  void *pargp
282)
283{
284    rtems_libio_ioctl_args_t *args = pargp;
285 
286    if (args == 0)
287        goto done;
288 
289    /*
290     * This is hokey, but until we get a defined interface
291     * to do this, it will just be this simple...
292     */
293 
294    if (args->command == rtems_build_name('I', 'S', 'R', ' '))
295    {
296        Clock_isr(PPC_IRQ_PIT);
297    }
298    else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
299    {
300        ReInstall_clock(args->buffer);
301    }
302 
303done:
304    return RTEMS_SUCCESSFUL;
305}
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