source: rtems/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c @ 73cdeb6

4.104.114.84.9
Last change on this file since 73cdeb6 was 73cdeb6, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on Jul 4, 2007 at 12:25:49 PM

merged individual exception handler code to a common one.

  • Property mode set to 100644
File size: 10.8 KB
Line 
1/*  clock.c
2 *
3 *  This routine initializes the interval timer on the
4 *  PowerPC 403 CPU.  The tick frequency is specified by the bsp.
5 *
6 *  Author: Andrew Bray <andy@i-cubed.co.uk>
7 *
8 *  COPYRIGHT (c) 1995 by i-cubed ltd.
9 *
10 *  To anyone who acknowledges that this file is provided "AS IS"
11 *  without any express or implied warranty:
12 *      permission to use, copy, modify, and distribute this file
13 *      for any purpose is hereby granted without fee, provided that
14 *      the above copyright notice and this notice appears in all
15 *      copies, and that the name of i-cubed limited not be used in
16 *      advertising or publicity pertaining to distribution of the
17 *      software without specific, written prior permission.
18 *      i-cubed limited makes no representations about the suitability
19 *      of this software for any purpose.
20 *
21 *  Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c:
22 *
23 *  Modifications for deriving timer clock from cpu system clock by
24 *              Thomas Doerfler <td@imd.m.isar.de>
25 *  for these modifications:
26 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
27 *
28 *  COPYRIGHT (c) 1989-1999.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.rtems.com/license/LICENSE.
34 *
35 *  Modifications for PPC405GP by Dennis Ehlin
36 *
37 *  $Id$
38 */
39
40#include <rtems.h>
41#include <rtems/clockdrv.h>
42#include <rtems/libio.h>
43#include <stdlib.h>                     /* for atexit() */
44#include <rtems/bspIo.h>
45/*
46 * check, which exception handling code is present
47 */
48#if !defined(ppc405)
49#define PPC_HAS_CLASSIC_EXCEPTIONS TRUE
50#else
51#define PPC_HAS_CLASSIC_EXCEPTIONS FALSE
52#include <bsp/irq.h>
53#endif
54
55volatile uint32_t   Clock_driver_ticks;
56static uint32_t   pit_value, tick_time;
57static rtems_boolean auto_restart;
58
59void Clock_exit( void );
60 
61rtems_isr_entry set_vector(                    /* returns old vector */
62  rtems_isr_entry     handler,                  /* isr routine        */
63  rtems_vector_number vector,                   /* vector number      */
64  int                 type                      /* RTEMS or RAW intr  */
65);
66
67/*
68 * These are set by clock driver during its init
69 */
70 
71rtems_device_major_number rtems_clock_major = ~0;
72rtems_device_minor_number rtems_clock_minor;
73 
74static inline uint32_t   get_itimer(void)
75{
76    register uint32_t   rc;
77
78#ifndef ppc405 /* this is a ppc403 */
79    asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
80#else /* ppc405 */
81    asm volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
82#endif /* ppc405 */
83
84    return rc;
85}
86
87/*
88 *  ISR Handler
89 */
90
91#if PPC_HAS_CLASSIC_EXCEPTIONS
92rtems_isr Clock_isr(rtems_vector_number vector)
93#else
94void Clock_isr(void* handle)
95#endif
96{
97    uint32_t   clicks_til_next_interrupt;
98    if (!auto_restart)
99    {
100      uint32_t   itimer_value;
101      /*
102       * setup for next interrupt; making sure the new value is reasonably
103       * in the future.... in case we lost out on an interrupt somehow
104       */
105 
106      itimer_value = get_itimer();
107      tick_time += pit_value;
108 
109      /*
110       * how far away is next interrupt *really*
111       * It may be a long time; this subtraction works even if
112       * Clock_clicks_interrupt < Clock_clicks_low_order via
113       * the miracle of unsigned math.
114       */
115      clicks_til_next_interrupt = tick_time - itimer_value;
116 
117      /*
118       * If it is too soon then bump it up.
119       * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
120       * But setting it low is useful for debug, so...
121       */
122 
123      if (clicks_til_next_interrupt < 400)
124      {
125        tick_time = itimer_value + 1000;
126        clicks_til_next_interrupt = 1000;
127        /* XXX: count these! this should be rare */
128      }
129 
130      /*
131       * If it is too late, that means we missed the interrupt somehow.
132       * Rather than wait 35-50s for a wrap, we just fudge it here.
133       */
134 
135      if (clicks_til_next_interrupt > pit_value)
136      {
137        tick_time = itimer_value + 1000;
138        clicks_til_next_interrupt = 1000;
139        /* XXX: count these! this should never happen :-) */
140      }
141 
142      asm volatile ("mtspr 0x3db, %0" :: "r" 
143                         (clicks_til_next_interrupt)); /* PIT */
144  }
145 
146    asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
147 
148    Clock_driver_ticks++;
149 
150    rtems_clock_tick();
151}
152
153#if !PPC_HAS_CLASSIC_EXCEPTIONS
154int ClockIsOn(const rtems_irq_connect_data* unused)
155{
156    register uint32_t   tcr;
157 
158    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
159 
160    return (tcr & 0x04000000) != 0;
161}
162#endif
163
164void ClockOff(
165#if PPC_HAS_CLASSIC_EXCEPTIONS
166              void
167#else
168              const rtems_irq_connect_data* unused
169#endif
170              )
171{
172    register uint32_t   tcr;
173 
174    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
175 
176    tcr &= ~ 0x04400000;
177 
178    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ 
179}
180
181void ClockOn(
182#if PPC_HAS_CLASSIC_EXCEPTIONS
183              void
184#else
185              const rtems_irq_connect_data* unused
186#endif
187              )
188{
189    uint32_t   iocr;
190    register uint32_t   tcr;
191#ifdef ppc403
192    uint32_t   pvr;
193#endif /* ppc403 */
194 
195    Clock_driver_ticks = 0;
196 
197#ifndef ppc405 /* this is a ppc403 */
198    asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
199    if (rtems_cpu_configuration_get_timer_internal_clock()) {
200        iocr &= ~4; /* timer clocked from system clock */
201    }
202    else {
203        iocr |= 4; /* select external timer clock */
204    }
205    asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
206 
207    asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
208    if (((pvr & 0xffff0000) >> 16) != 0x0020)
209      return; /* Not a ppc403 */
210 
211    if ((pvr & 0xff00) == 0x0000) /* 403GA */
212#if 0 /* FIXME: in which processor versions will "autoload" work properly? */
213      auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0;
214#else
215    /* no known chip version supports auto restart of timer... */
216    auto_restart = 0;
217#endif
218    else if ((pvr & 0xff00) == 0x0100) /* 403GB */
219      auto_restart = 1;
220 
221#else /* ppc405 */
222    asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
223    if (rtems_cpu_configuration_get_timer_internal_clock()) {
224        iocr &=~0x800000        ;/* timer clocked from system clock CETE*/
225    }
226    else {
227        iocr |= 0x800000; /* select external timer clock CETE*/
228    }
229    asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
230
231     /*
232      * Enable auto restart
233      */
234
235    auto_restart=1;
236
237#endif /* ppc405 */
238    pit_value = rtems_configuration_get_microseconds_per_tick() *
239      rtems_cpu_configuration_get_clicks_per_usec();
240 
241     /*
242      * Set PIT value
243      */
244
245    asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
246 
247     /*     
248      * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
249      * Enable PIT interrupt, bit TCR->PIE = 1     0x4000000
250      */
251    tick_time = get_itimer() + pit_value;
252
253    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ 
254    tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
255#if 1
256    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
257#endif
258
259}
260
261
262
263void Install_clock(
264#if PPC_HAS_CLASSIC_EXCEPTIONS
265                   rtems_isr_entry clock_isr
266#else
267                   void (*clock_isr)(void *)
268#endif
269                   )
270{
271#ifdef ppc403
272    uint32_t   pvr;
273#endif /* ppc403 */
274 
275    Clock_driver_ticks = 0;
276 
277    /*
278     * initialize the interval here
279     * First tick is set to right amount of time in the future
280     * Future ticks will be incremented over last value set
281     * in order to provide consistent clicks in the face of
282     * interrupt overhead
283     */
284
285#if PPC_HAS_CLASSIC_EXCEPTIONS
286 {
287    rtems_isr_entry previous_isr;
288    rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
289    ClockOn();
290 }
291#else
292 {
293   rtems_irq_connect_data clockIrqConnData;
294   clockIrqConnData.on   = ClockOn;
295   clockIrqConnData.off  = ClockOff;
296   clockIrqConnData.isOn = ClockIsOn;
297   clockIrqConnData.name = BSP_PIT;
298   clockIrqConnData.hdl  = clock_isr;
299   if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
300     printk("Unable to connect Clock Irq handler\n");
301     rtems_fatal_error_occurred(1);
302   }
303 }
304#endif
305    atexit(Clock_exit);
306}
307
308void
309ReInstall_clock(
310#if PPC_HAS_CLASSIC_EXCEPTIONS
311                rtems_isr_entry new_clock_isr
312#else
313                void (*new_clock_isr)(void *)
314#endif
315)
316{
317  uint32_t   isrlevel = 0;
318 
319  rtems_interrupt_disable(isrlevel);
320 
321#if PPC_HAS_CLASSIC_EXCEPTIONS
322 {
323   rtems_isr_entry previous_isr;
324   rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr);
325   ClockOn();
326 }
327#else
328  {
329    rtems_irq_connect_data clockIrqConnData;
330   
331    clockIrqConnData.name = BSP_PIT;
332    if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
333      printk("Unable to stop system clock\n");
334      rtems_fatal_error_occurred(1);
335    }
336   
337    BSP_remove_rtems_irq_handler (&clockIrqConnData);
338   
339    clockIrqConnData.on   = ClockOn;
340    clockIrqConnData.off  = ClockOff;
341    clockIrqConnData.isOn = ClockIsOn;
342    clockIrqConnData.name = BSP_PIT;
343    clockIrqConnData.hdl  = new_clock_isr;
344
345    if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
346      printk("Unable to connect Clock Irq handler\n");
347      rtems_fatal_error_occurred(1);
348    }
349  }
350#endif
351
352  rtems_interrupt_enable(isrlevel);
353}
354
355
356/*
357 * Called via atexit()
358 * Remove the clock interrupt handler by setting handler to NULL
359 *
360 * This will not work on the 405GP because
361 * when bit's are set in TCR they can only be unset by a reset
362 */
363
364void Clock_exit(void)
365{
366#if PPC_HAS_CLASSIC_EXCEPTIONS
367  ClockOff();
368 
369  (void) set_vector(0, PPC_IRQ_PIT, 1);
370#else
371 {
372    rtems_irq_connect_data clockIrqConnData;
373   
374    clockIrqConnData.name = BSP_PIT;
375    if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
376      printk("Unable to stop system clock\n");
377      rtems_fatal_error_occurred(1);
378    }
379   
380    BSP_remove_rtems_irq_handler (&clockIrqConnData);
381 }
382#endif
383}
384
385rtems_device_driver Clock_initialize(
386  rtems_device_major_number major,
387  rtems_device_minor_number minor,
388  void *pargp
389)
390{
391  Install_clock( Clock_isr );
392 
393  /*
394   * make major/minor avail to others such as shared memory driver
395   */
396 
397  rtems_clock_major = major;
398  rtems_clock_minor = minor;
399 
400  return RTEMS_SUCCESSFUL;
401}
402 
403rtems_device_driver Clock_control(
404  rtems_device_major_number major,
405  rtems_device_minor_number minor,
406  void *pargp
407)
408{
409    rtems_libio_ioctl_args_t *args = pargp;
410 
411    if (args == 0)
412        goto done;
413 
414    /*
415     * This is hokey, but until we get a defined interface
416     * to do this, it will just be this simple...
417     */
418 
419    if (args->command == rtems_build_name('I', 'S', 'R', ' '))
420    {
421#if PPC_HAS_CLASSIC_EXCEPTIONS
422        Clock_isr(PPC_IRQ_PIT);
423#else
424        Clock_isr(NULL);
425#endif
426    }
427    else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
428    {
429        ReInstall_clock(args->buffer);
430    }
431 
432done:
433    return RTEMS_SUCCESSFUL;
434}
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