source: rtems/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c @ 12ae8a16

4.104.114.9
Last change on this file since 12ae8a16 was 12ae8a16, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 28, 2007 at 10:03:43 PM

2007-11-28 Joel Sherrill <joel.sherrill@…>

  • ppc403/clock/clock.c: Now compiles and links.
  • Property mode set to 100644
File size: 10.8 KB
Line 
1/*  clock.c
2 *
3 *  This routine initializes the interval timer on the
4 *  PowerPC 403 CPU.  The tick frequency is specified by the bsp.
5 *
6 *  Author: Andrew Bray <andy@i-cubed.co.uk>
7 *
8 *  COPYRIGHT (c) 1995 by i-cubed ltd.
9 *
10 *  To anyone who acknowledges that this file is provided "AS IS"
11 *  without any express or implied warranty:
12 *      permission to use, copy, modify, and distribute this file
13 *      for any purpose is hereby granted without fee, provided that
14 *      the above copyright notice and this notice appears in all
15 *      copies, and that the name of i-cubed limited not be used in
16 *      advertising or publicity pertaining to distribution of the
17 *      software without specific, written prior permission.
18 *      i-cubed limited makes no representations about the suitability
19 *      of this software for any purpose.
20 *
21 *  Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c:
22 *
23 *  Modifications for deriving timer clock from cpu system clock by
24 *              Thomas Doerfler <td@imd.m.isar.de>
25 *  for these modifications:
26 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
27 *
28 *  COPYRIGHT (c) 1989-2007.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.rtems.com/license/LICENSE.
34 *
35 *  Modifications for PPC405GP by Dennis Ehlin
36 *
37 *  $Id$
38 */
39
40#include <rtems.h>
41#include <rtems/clockdrv.h>
42#include <rtems/libio.h>
43#include <stdlib.h>                     /* for atexit() */
44#include <rtems/bspIo.h>
45/*
46 * check, which exception handling code is present
47 */
48#if !defined(ppc405)
49#define PPC_HAS_CLASSIC_EXCEPTIONS TRUE
50#else
51#define PPC_HAS_CLASSIC_EXCEPTIONS FALSE
52#include <bsp/irq.h>
53#endif
54
55volatile uint32_t   Clock_driver_ticks;
56static uint32_t   pit_value, tick_time;
57static rtems_boolean auto_restart;
58
59void Clock_exit( void );
60 
61rtems_isr_entry set_vector(                    /* returns old vector */
62  rtems_isr_entry     handler,                  /* isr routine        */
63  rtems_vector_number vector,                   /* vector number      */
64  int                 type                      /* RTEMS or RAW intr  */
65);
66
67/*
68 * These are set by clock driver during its init
69 */
70 
71rtems_device_major_number rtems_clock_major = ~0;
72rtems_device_minor_number rtems_clock_minor;
73 
74static inline uint32_t   get_itimer(void)
75{
76    register uint32_t   rc;
77
78#ifndef ppc405 /* this is a ppc403 */
79    asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
80#else /* ppc405 */
81    asm volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
82#endif /* ppc405 */
83
84    return rc;
85}
86
87/*
88 *  ISR Handler
89 */
90
91#if PPC_HAS_CLASSIC_EXCEPTIONS
92rtems_isr Clock_isr(rtems_vector_number vector)
93#else
94void Clock_isr(void* handle)
95#endif
96{
97    uint32_t   clicks_til_next_interrupt;
98    if (!auto_restart)
99    {
100      uint32_t   itimer_value;
101      /*
102       * setup for next interrupt; making sure the new value is reasonably
103       * in the future.... in case we lost out on an interrupt somehow
104       */
105 
106      itimer_value = get_itimer();
107      tick_time += pit_value;
108 
109      /*
110       * how far away is next interrupt *really*
111       * It may be a long time; this subtraction works even if
112       * Clock_clicks_interrupt < Clock_clicks_low_order via
113       * the miracle of unsigned math.
114       */
115      clicks_til_next_interrupt = tick_time - itimer_value;
116 
117      /*
118       * If it is too soon then bump it up.
119       * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
120       * But setting it low is useful for debug, so...
121       */
122 
123      if (clicks_til_next_interrupt < 400)
124      {
125        tick_time = itimer_value + 1000;
126        clicks_til_next_interrupt = 1000;
127        /* XXX: count these! this should be rare */
128      }
129 
130      /*
131       * If it is too late, that means we missed the interrupt somehow.
132       * Rather than wait 35-50s for a wrap, we just fudge it here.
133       */
134 
135      if (clicks_til_next_interrupt > pit_value)
136      {
137        tick_time = itimer_value + 1000;
138        clicks_til_next_interrupt = 1000;
139        /* XXX: count these! this should never happen :-) */
140      }
141 
142      asm volatile ("mtspr 0x3db, %0" :: "r" 
143                         (clicks_til_next_interrupt)); /* PIT */
144  }
145 
146    asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
147 
148    Clock_driver_ticks++;
149 
150    rtems_clock_tick();
151}
152
153#if !PPC_HAS_CLASSIC_EXCEPTIONS
154int ClockIsOn(const rtems_irq_connect_data* unused)
155{
156    register uint32_t   tcr;
157 
158    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
159 
160    return (tcr & 0x04000000) != 0;
161}
162#endif
163
164void ClockOff(
165#if PPC_HAS_CLASSIC_EXCEPTIONS
166              void
167#else
168              const rtems_irq_connect_data* unused
169#endif
170              )
171{
172    register uint32_t   tcr;
173 
174    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
175 
176    tcr &= ~ 0x04400000;
177 
178    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ 
179}
180
181void ClockOn(
182#if PPC_HAS_CLASSIC_EXCEPTIONS
183              void
184#else
185              const rtems_irq_connect_data* unused
186#endif
187              )
188{
189    uint32_t   iocr;
190    register uint32_t   tcr;
191    extern uint32_t bsp_clicks_per_usec;
192    extern boolean bsp_timer_internal_clock;
193#ifdef ppc403
194    uint32_t   pvr;
195#endif /* ppc403 */
196 
197    Clock_driver_ticks = 0;
198 
199#ifndef ppc405 /* this is a ppc403 */
200    asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
201    if (bsp_timer_internal_clock) {
202        iocr &= ~4; /* timer clocked from system clock */
203    }
204    else {
205        iocr |= 4; /* select external timer clock */
206    }
207    asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
208 
209    asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
210    if (((pvr & 0xffff0000) >> 16) != 0x0020)
211      return; /* Not a ppc403 */
212 
213    if ((pvr & 0xff00) == 0x0000) /* 403GA */
214#if 0 /* FIXME: in which processor versions will "autoload" work properly? */
215      auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0;
216#else
217    /* no known chip version supports auto restart of timer... */
218    auto_restart = 0;
219#endif
220    else if ((pvr & 0xff00) == 0x0100) /* 403GB */
221      auto_restart = 1;
222 
223#else /* ppc405 */
224    asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
225    if (bsp_timer_internal_clock) {
226        iocr &=~0x800000        ;/* timer clocked from system clock CETE*/
227    }
228    else {
229        iocr |= 0x800000; /* select external timer clock CETE*/
230    }
231    asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
232
233     /*
234      * Enable auto restart
235      */
236
237    auto_restart=1;
238
239#endif /* ppc405 */
240    pit_value = rtems_configuration_get_microseconds_per_tick() *
241      bsp_clicks_per_usec;
242 
243     /*
244      * Set PIT value
245      */
246
247    asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
248 
249     /*     
250      * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
251      * Enable PIT interrupt, bit TCR->PIE = 1     0x4000000
252      */
253    tick_time = get_itimer() + pit_value;
254
255    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ 
256    tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
257#if 1
258    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
259#endif
260
261}
262
263
264
265void Install_clock(
266#if PPC_HAS_CLASSIC_EXCEPTIONS
267                   rtems_isr_entry clock_isr
268#else
269                   void (*clock_isr)(void *)
270#endif
271                   )
272{
273#ifdef ppc403
274    uint32_t   pvr;
275#endif /* ppc403 */
276 
277    Clock_driver_ticks = 0;
278 
279    /*
280     * initialize the interval here
281     * First tick is set to right amount of time in the future
282     * Future ticks will be incremented over last value set
283     * in order to provide consistent clicks in the face of
284     * interrupt overhead
285     */
286
287#if PPC_HAS_CLASSIC_EXCEPTIONS
288 {
289    rtems_isr_entry previous_isr;
290    rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
291    ClockOn();
292 }
293#else
294 {
295   rtems_irq_connect_data clockIrqConnData;
296   clockIrqConnData.on   = ClockOn;
297   clockIrqConnData.off  = ClockOff;
298   clockIrqConnData.isOn = ClockIsOn;
299   clockIrqConnData.name = BSP_PIT;
300   clockIrqConnData.hdl  = clock_isr;
301   if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
302     printk("Unable to connect Clock Irq handler\n");
303     rtems_fatal_error_occurred(1);
304   }
305 }
306#endif
307    atexit(Clock_exit);
308}
309
310void
311ReInstall_clock(
312#if PPC_HAS_CLASSIC_EXCEPTIONS
313                rtems_isr_entry new_clock_isr
314#else
315                void (*new_clock_isr)(void *)
316#endif
317)
318{
319  uint32_t   isrlevel = 0;
320 
321  rtems_interrupt_disable(isrlevel);
322 
323#if PPC_HAS_CLASSIC_EXCEPTIONS
324 {
325   rtems_isr_entry previous_isr;
326   rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr);
327   ClockOn();
328 }
329#else
330  {
331    rtems_irq_connect_data clockIrqConnData;
332   
333    clockIrqConnData.name = BSP_PIT;
334    if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
335      printk("Unable to stop system clock\n");
336      rtems_fatal_error_occurred(1);
337    }
338   
339    BSP_remove_rtems_irq_handler (&clockIrqConnData);
340   
341    clockIrqConnData.on   = ClockOn;
342    clockIrqConnData.off  = ClockOff;
343    clockIrqConnData.isOn = ClockIsOn;
344    clockIrqConnData.name = BSP_PIT;
345    clockIrqConnData.hdl  = new_clock_isr;
346
347    if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
348      printk("Unable to connect Clock Irq handler\n");
349      rtems_fatal_error_occurred(1);
350    }
351  }
352#endif
353
354  rtems_interrupt_enable(isrlevel);
355}
356
357
358/*
359 * Called via atexit()
360 * Remove the clock interrupt handler by setting handler to NULL
361 *
362 * This will not work on the 405GP because
363 * when bit's are set in TCR they can only be unset by a reset
364 */
365
366void Clock_exit(void)
367{
368#if PPC_HAS_CLASSIC_EXCEPTIONS
369  ClockOff();
370 
371  (void) set_vector(0, PPC_IRQ_PIT, 1);
372#else
373 {
374    rtems_irq_connect_data clockIrqConnData;
375   
376    clockIrqConnData.name = BSP_PIT;
377    if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
378      printk("Unable to stop system clock\n");
379      rtems_fatal_error_occurred(1);
380    }
381   
382    BSP_remove_rtems_irq_handler (&clockIrqConnData);
383 }
384#endif
385}
386
387rtems_device_driver Clock_initialize(
388  rtems_device_major_number major,
389  rtems_device_minor_number minor,
390  void *pargp
391)
392{
393  Install_clock( Clock_isr );
394 
395  /*
396   * make major/minor avail to others such as shared memory driver
397   */
398 
399  rtems_clock_major = major;
400  rtems_clock_minor = minor;
401 
402  return RTEMS_SUCCESSFUL;
403}
404 
405rtems_device_driver Clock_control(
406  rtems_device_major_number major,
407  rtems_device_minor_number minor,
408  void *pargp
409)
410{
411    rtems_libio_ioctl_args_t *args = pargp;
412 
413    if (args == 0)
414        goto done;
415 
416    /*
417     * This is hokey, but until we get a defined interface
418     * to do this, it will just be this simple...
419     */
420 
421    if (args->command == rtems_build_name('I', 'S', 'R', ' '))
422    {
423#if PPC_HAS_CLASSIC_EXCEPTIONS
424        Clock_isr(PPC_IRQ_PIT);
425#else
426        Clock_isr(NULL);
427#endif
428    }
429    else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
430    {
431        ReInstall_clock(args->buffer);
432    }
433 
434done:
435    return RTEMS_SUCCESSFUL;
436}
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