[3235ad9] | 1 | /* clock.c |
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| 2 | * |
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| 3 | * This routine initializes the interval timer on the |
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| 4 | * PowerPC 403 CPU. The tick frequency is specified by the bsp. |
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| 5 | * |
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[e57b0e2] | 6 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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[3235ad9] | 7 | * |
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| 8 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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| 9 | * |
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| 10 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 11 | * without any express or implied warranty: |
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| 12 | * permission to use, copy, modify, and distribute this file |
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| 13 | * for any purpose is hereby granted without fee, provided that |
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| 14 | * the above copyright notice and this notice appears in all |
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| 15 | * copies, and that the name of i-cubed limited not be used in |
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| 16 | * advertising or publicity pertaining to distribution of the |
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| 17 | * software without specific, written prior permission. |
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| 18 | * i-cubed limited makes no representations about the suitability |
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| 19 | * of this software for any purpose. |
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| 20 | * |
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| 21 | * Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c: |
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| 22 | * |
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| 23 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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| 24 | * On-Line Applications Research Corporation (OAR). |
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| 25 | * All rights assigned to U.S. Government, 1994. |
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| 26 | * |
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| 27 | * This material may be reproduced by or for the U.S. Government pursuant |
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| 28 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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| 29 | * notice must appear in all copies of this file and its derivatives. |
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| 30 | * |
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[879a047] | 31 | * $Id$ |
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[3235ad9] | 32 | */ |
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| 33 | |
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| 34 | #include <bsp.h> |
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| 35 | #include <clockdrv.h> |
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[3a4ae6c] | 36 | #include <rtems/libio.h> |
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[3235ad9] | 37 | |
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| 38 | #include <stdlib.h> /* for atexit() */ |
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| 39 | |
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| 40 | extern rtems_cpu_table Cpu_table; /* owned by BSP */ |
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| 41 | |
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| 42 | volatile rtems_unsigned32 Clock_driver_ticks; |
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| 43 | static rtems_unsigned32 pit_value, tick_time; |
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| 44 | static rtems_boolean auto_restart; |
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| 45 | |
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[3a4ae6c] | 46 | void Clock_exit( void ); |
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| 47 | |
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| 48 | /* |
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| 49 | * These are set by clock driver during its init |
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| 50 | */ |
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| 51 | |
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| 52 | rtems_device_major_number rtems_clock_major = ~0; |
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| 53 | rtems_device_minor_number rtems_clock_minor; |
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| 54 | |
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| 55 | static INLINE rtems_unsigned32 get_itimer(void) |
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[3235ad9] | 56 | { |
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[3a4ae6c] | 57 | register rtems_unsigned32 rc; |
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[3235ad9] | 58 | |
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[e57b0e2] | 59 | asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */ |
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[3235ad9] | 60 | |
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[3a4ae6c] | 61 | return rc; |
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| 62 | } |
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| 63 | |
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| 64 | /* |
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| 65 | * ISR Handler |
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| 66 | */ |
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| 67 | |
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| 68 | rtems_isr |
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| 69 | Clock_isr(rtems_vector_number vector) |
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[3235ad9] | 70 | { |
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[3a4ae6c] | 71 | if (!auto_restart) |
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[e57b0e2] | 72 | { |
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| 73 | rtems_unsigned32 clicks_til_next_interrupt; |
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| 74 | rtems_unsigned32 itimer_value; |
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| 75 | |
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| 76 | /* |
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| 77 | * setup for next interrupt; making sure the new value is reasonably |
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| 78 | * in the future.... in case we lost out on an interrupt somehow |
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| 79 | */ |
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| 80 | |
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| 81 | itimer_value = get_itimer(); |
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| 82 | tick_time += pit_value; |
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| 83 | |
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| 84 | /* |
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| 85 | * how far away is next interrupt *really* |
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| 86 | * It may be a long time; this subtraction works even if |
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| 87 | * Clock_clicks_interrupt < Clock_clicks_low_order via |
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| 88 | * the miracle of unsigned math. |
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| 89 | */ |
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| 90 | clicks_til_next_interrupt = tick_time - itimer_value; |
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| 91 | |
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| 92 | /* |
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| 93 | * If it is too soon then bump it up. |
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| 94 | * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small. |
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| 95 | * But setting it low is useful for debug, so... |
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| 96 | */ |
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| 97 | |
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| 98 | if (clicks_til_next_interrupt < 400) |
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| 99 | { |
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| 100 | tick_time = itimer_value + 1000; |
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| 101 | clicks_til_next_interrupt = 1000; |
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| 102 | /* XXX: count these! this should be rare */ |
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| 103 | } |
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| 104 | |
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| 105 | /* |
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| 106 | * If it is too late, that means we missed the interrupt somehow. |
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| 107 | * Rather than wait 35-50s for a wrap, we just fudge it here. |
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| 108 | */ |
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| 109 | |
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| 110 | if (clicks_til_next_interrupt > pit_value) |
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| 111 | { |
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| 112 | tick_time = itimer_value + 1000; |
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| 113 | clicks_til_next_interrupt = 1000; |
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| 114 | /* XXX: count these! this should never happen :-) */ |
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| 115 | } |
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| 116 | |
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| 117 | asm volatile ("mtspr 0x3db, %0" :: "r" |
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| 118 | (clicks_til_next_interrupt)); /* PIT */ |
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| 119 | } |
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| 120 | |
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| 121 | asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */ |
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| 122 | |
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[3a4ae6c] | 123 | Clock_driver_ticks++; |
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[e57b0e2] | 124 | |
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[3a4ae6c] | 125 | rtems_clock_tick(); |
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[3235ad9] | 126 | } |
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| 127 | |
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| 128 | void Install_clock(rtems_isr_entry clock_isr) |
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| 129 | { |
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| 130 | rtems_isr_entry previous_isr; |
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| 131 | rtems_unsigned32 pvr, iocr; |
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[e57b0e2] | 132 | |
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[3235ad9] | 133 | Clock_driver_ticks = 0; |
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[e57b0e2] | 134 | |
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| 135 | asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */ |
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[3235ad9] | 136 | iocr &= ~4; |
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| 137 | iocr |= 4; /* Select external timer clock */ |
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[e57b0e2] | 138 | asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */ |
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| 139 | |
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| 140 | asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */ |
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| 141 | |
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[3235ad9] | 142 | if (((pvr & 0xffff0000) >> 16) != 0x0020) |
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[e57b0e2] | 143 | return; /* Not a ppc403 */ |
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| 144 | |
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[3235ad9] | 145 | if ((pvr & 0xff00) == 0x0000) /* 403GA */ |
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[e57b0e2] | 146 | auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0; |
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[3235ad9] | 147 | else if ((pvr & 0xff00) == 0x0100) /* 403GB */ |
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[e57b0e2] | 148 | auto_restart = 1; |
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| 149 | |
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[3235ad9] | 150 | pit_value = BSP_Configuration.microseconds_per_tick * |
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[e57b0e2] | 151 | Cpu_table.clicks_per_usec; |
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| 152 | |
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[3235ad9] | 153 | if (BSP_Configuration.ticks_per_timeslice) |
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| 154 | { |
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[e57b0e2] | 155 | register rtems_unsigned32 tcr; |
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| 156 | |
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[3235ad9] | 157 | /* |
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| 158 | * initialize the interval here |
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| 159 | * First tick is set to right amount of time in the future |
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| 160 | * Future ticks will be incremented over last value set |
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| 161 | * in order to provide consistent clicks in the face of |
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| 162 | * interrupt overhead |
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| 163 | */ |
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[e57b0e2] | 164 | |
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| 165 | rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr); |
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| 166 | |
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| 167 | asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */ |
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| 168 | |
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| 169 | asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ |
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| 170 | |
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| 171 | tcr &= ~ 0x04400000; |
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| 172 | |
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| 173 | tcr |= (auto_restart ? 0x04400000 : 0x04000000); |
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| 174 | |
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| 175 | tick_time = get_itimer() + pit_value; |
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| 176 | |
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| 177 | asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ |
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[3235ad9] | 178 | } |
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| 179 | atexit(Clock_exit); |
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| 180 | } |
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| 181 | |
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[3a4ae6c] | 182 | void |
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| 183 | ReInstall_clock(rtems_isr_entry new_clock_isr) |
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[3235ad9] | 184 | { |
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[3a4ae6c] | 185 | rtems_isr_entry previous_isr; |
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| 186 | rtems_unsigned32 isrlevel = 0; |
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[3235ad9] | 187 | |
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[3a4ae6c] | 188 | rtems_interrupt_disable(isrlevel); |
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| 189 | |
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[e57b0e2] | 190 | rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr); |
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[3235ad9] | 191 | |
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[3a4ae6c] | 192 | rtems_interrupt_enable(isrlevel); |
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[3235ad9] | 193 | } |
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| 194 | |
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[3a4ae6c] | 195 | |
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[3235ad9] | 196 | /* |
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| 197 | * Called via atexit() |
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| 198 | * Remove the clock interrupt handler by setting handler to NULL |
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| 199 | */ |
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| 200 | |
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| 201 | void |
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| 202 | Clock_exit(void) |
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| 203 | { |
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| 204 | if ( BSP_Configuration.ticks_per_timeslice ) |
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| 205 | { |
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[e57b0e2] | 206 | register rtems_unsigned32 tcr; |
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| 207 | |
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| 208 | asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ |
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| 209 | |
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| 210 | tcr &= ~ 0x04400000; |
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| 211 | |
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| 212 | asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ |
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| 213 | |
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| 214 | (void) set_vector(0, PPC_IRQ_PIT, 1); |
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[3235ad9] | 215 | } |
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[e57b0e2] | 216 | |
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[3235ad9] | 217 | } |
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| 218 | |
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[3a4ae6c] | 219 | rtems_device_driver Clock_initialize( |
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| 220 | rtems_device_major_number major, |
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| 221 | rtems_device_minor_number minor, |
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| 222 | void *pargp |
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| 223 | ) |
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| 224 | { |
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| 225 | Install_clock( Clock_isr ); |
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| 226 | |
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| 227 | /* |
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| 228 | * make major/minor avail to others such as shared memory driver |
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| 229 | */ |
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| 230 | |
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| 231 | rtems_clock_major = major; |
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| 232 | rtems_clock_minor = minor; |
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| 233 | |
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| 234 | return RTEMS_SUCCESSFUL; |
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| 235 | } |
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| 236 | |
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| 237 | rtems_device_driver Clock_control( |
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| 238 | rtems_device_major_number major, |
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| 239 | rtems_device_minor_number minor, |
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| 240 | void *pargp |
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| 241 | ) |
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| 242 | { |
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| 243 | rtems_libio_ioctl_args_t *args = pargp; |
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| 244 | |
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| 245 | if (args == 0) |
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| 246 | goto done; |
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| 247 | |
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| 248 | /* |
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| 249 | * This is hokey, but until we get a defined interface |
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| 250 | * to do this, it will just be this simple... |
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| 251 | */ |
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| 252 | |
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| 253 | if (args->command == rtems_build_name('I', 'S', 'R', ' ')) |
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| 254 | { |
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| 255 | Clock_isr(PPC_IRQ_PIT); |
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| 256 | } |
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| 257 | else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) |
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| 258 | { |
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| 259 | ReInstall_clock(args->buffer); |
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| 260 | } |
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| 261 | |
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| 262 | done: |
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| 263 | return RTEMS_SUCCESSFUL; |
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| 264 | } |
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| 265 | |
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