source: rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c @ 830e5f7

4.104.114.84.95
Last change on this file since 830e5f7 was 830e5f7, checked in by Joel Sherrill <joel.sherrill@…>, on 05/14/02 at 17:45:53

2001-05-14 Till Straumann <strauman@…>

  • cpu.c: Per PR211 fix saving/restoring floating point context. The fpsave and fprestore routines are only used in a executing context which _is_ fp and hence has the FPU enabled. The current behavior required the FPU always to be on which is very dangerous if lazy context switching is used. [Joel Note: Some ports explicitly enabled the FPU in the FP save and restore routines to avoid this.]

The patch also makes sure (on powerpc only) that the FPU is disabled
for integer tasks. Note that this is crucial if deferred fp context
switching is used. Otherwise, fp context corruption may go undetected!
Also note that even tasks which merely push/pop FP registers to/from
the stack without modifying them still MUST be FP tasks - otherwise
(if lazy FP context switching is used), FP register corruption (of
other, FP, tasks may occur)!

Furthermore, (on PPC) by default, lazy FP context save/restore
is _disabled_.

  • Property mode set to 100644
File size: 3.7 KB
Line 
1/*
2 *  PowerPC CPU Dependent Source
3 *
4 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
5 *
6 *  COPYRIGHT (c) 1995 by i-cubed ltd.
7 *
8 *  To anyone who acknowledges that this file is provided "AS IS"
9 *  without any express or implied warranty:
10 *      permission to use, copy, modify, and distribute this file
11 *      for any purpose is hereby granted without fee, provided that
12 *      the above copyright notice and this notice appears in all
13 *      copies, and that the name of i-cubed limited not be used in
14 *      advertising or publicity pertaining to distribution of the
15 *      software without specific, written prior permission.
16 *      i-cubed limited makes no representations about the suitability
17 *      of this software for any purpose.
18 *
19 *  Derived from c/src/exec/cpu/no_cpu/cpu.c:
20 *
21 *  COPYRIGHT (c) 1989-1997.
22 *  On-Line Applications Research Corporation (OAR).
23 *
24 *  The license and distribution terms for this file may be found in
25 *  the file LICENSE in this distribution or at
26 *  http://www.OARcorp.com/rtems/license.html.
27 *
28 *  $Id$
29 */
30
31#include <rtems/system.h>
32#include <rtems/score/isr.h>
33#include <rtems/score/context.h>
34#include <rtems/score/thread.h>
35#include <rtems/score/interr.h>
36
37
38/*  _CPU_Initialize
39 *
40 *  This routine performs processor dependent initialization.
41 *
42 *  INPUT PARAMETERS:
43 *    cpu_table       - CPU table to initialize
44 *    thread_dispatch - address of disptaching routine
45 */
46
47void _CPU_Initialize(
48  rtems_cpu_table  *cpu_table,
49  void      (*thread_dispatch)      /* ignored on this CPU */
50)
51{
52  _CPU_Table = *cpu_table;
53}
54
55/*PAGE
56 *
57 *  _CPU_Context_Initialize
58 */
59
60void _CPU_Context_Initialize(
61  Context_Control  *the_context,
62  unsigned32       *stack_base,
63  unsigned32        size,
64  unsigned32        new_level,
65  void             *entry_point,
66  boolean           is_fp
67)
68{
69  unsigned32 msr_value;
70  unsigned32 sp;
71
72  sp = (unsigned32)stack_base + size - CPU_MINIMUM_STACK_FRAME_SIZE;
73  *((unsigned32 *)sp) = 0;
74  the_context->gpr1 = sp;
75   
76  _CPU_MSR_GET( msr_value );
77
78  if (!(new_level & CPU_MODES_INTERRUPT_MASK)) {
79    msr_value |= MSR_EE;
80  }
81  else {
82    msr_value &= ~MSR_EE;
83  }
84
85  the_context->msr = msr_value;
86
87  /*
88   *  The FP bit of the MSR should only be enabled if this is a floating
89   *  point task.  Unfortunately, the vfprintf_r routine in newlib
90   *  ends up pushing a floating point register regardless of whether or
91   *  not a floating point number is being printed.  Serious restructuring
92   *  of vfprintf.c will be required to avoid this behavior.  At this
93   *  time (7 July 1997), this restructuring is not being done.
94   */
95
96  /* Till Straumann: For deferred FPContext save/restore, make sure integer
97   *                 tasks have no FPU access in order to catch violations.
98   *                 Otherwise, the FP registers may be corrupted.
99   *                             Since we set the_contex->msr using our current MSR,
100   *                             we must make sure MSR_FP is off if (!is_fp)...
101   */
102#if defined(CPU_USE_DEFERRED_FP_SWITCH) && (CPU_USE_DEFERRED_FP_SWITCH==TRUE)
103  if ( is_fp )
104#endif
105    the_context->msr |= PPC_MSR_FP;
106#if defined(CPU_USE_DEFERRED_FP_SWITCH) && (CPU_USE_DEFERRED_FP_SWITCH==TRUE)
107  else
108        the_context->msr &= ~PPC_MSR_FP;
109#endif
110
111  the_context->pc = (unsigned32)entry_point;
112}
113
114
115
116/*PAGE
117 *
118 *  _CPU_Install_interrupt_stack
119 */
120
121void _CPU_Install_interrupt_stack( void )
122{
123}
124
125/*PAGE
126 *
127 *  This is the PowerPC specific implementation of the routine which
128 *  returns TRUE if an interrupt is in progress.
129 */
130
131boolean _ISR_Is_in_progress( void )
132{
133  register unsigned int isr_nesting_level;
134  /*
135   * Move from special purpose register 0 (mfspr SPRG0, r3)
136   */
137  asm volatile ("mfspr  %0, 272" : "=r" (isr_nesting_level));
138  return isr_nesting_level;
139}
140
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