source: rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c @ 6ce3f7b

4.104.114.95
Last change on this file since 6ce3f7b was 6ce3f7b, checked in by Till Straumann <strauman@…>, on Jul 16, 2008 at 10:04:06 PM

2008-07-16 Till Straumann <strauman@…>

  • new-exceptions/cpu.c: propagate R2 to all task contexts even if the ABI is SVR4. Cannot hurt...
  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*
2 *  PowerPC CPU Dependent Source
3 *
4 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
5 *
6 *  COPYRIGHT (c) 1995 by i-cubed ltd.
7 *
8 *  To anyone who acknowledges that this file is provided "AS IS"
9 *  without any express or implied warranty:
10 *      permission to use, copy, modify, and distribute this file
11 *      for any purpose is hereby granted without fee, provided that
12 *      the above copyright notice and this notice appears in all
13 *      copies, and that the name of i-cubed limited not be used in
14 *      advertising or publicity pertaining to distribution of the
15 *      software without specific, written prior permission.
16 *      i-cubed limited makes no representations about the suitability
17 *      of this software for any purpose.
18 *
19 *  Derived from c/src/exec/cpu/no_cpu/cpu.c:
20 *
21 *  COPYRIGHT (c) 1989-1997.
22 *  On-Line Applications Research Corporation (OAR).
23 *
24 *  The license and distribution terms for this file may be found in
25 *  the file LICENSE in this distribution or at
26 *  http://www.rtems.com/license/LICENSE.
27 *
28 *  $Id$
29 */
30
31#include <rtems/system.h>
32#include <rtems/score/isr.h>
33#include <rtems/score/context.h>
34#include <rtems/score/thread.h>
35#include <rtems/score/interr.h>
36#include <rtems/powerpc/powerpc.h>
37
38/*  _CPU_Initialize
39 *
40 *  This routine performs processor dependent initialization.
41 *
42 *  INPUT PARAMETERS:
43 *    thread_dispatch - address of disptaching routine
44 */
45
46void _CPU_Initialize(
47  void      (*thread_dispatch)      /* ignored on this CPU */
48)
49{
50  /* Do nothing */
51}
52
53/*PAGE
54 *
55 *  _CPU_Context_Initialize
56 */
57
58
59void _CPU_Context_Initialize(
60  Context_Control  *the_context,
61  uint32_t         *stack_base,
62  uint32_t          size,
63  uint32_t          new_level,
64  void             *entry_point,
65  boolean           is_fp
66)
67{
68  uint32_t   msr_value;
69  uint32_t   sp;
70
71  sp = (uint32_t)stack_base + size - PPC_MINIMUM_STACK_FRAME_SIZE;
72
73  sp &= ~(CPU_STACK_ALIGNMENT-1);
74
75  *((uint32_t*)sp) = 0;
76  the_context->gpr1 = sp;
77
78  _CPU_MSR_GET( msr_value );
79
80  /*
81   * Setting the interrupt mask here is not strictly necessary
82   * since the IRQ level will be established from _Thread_Handler()
83   * again, as soon as the task starts execution.
84   * Because we have to establish a defined state anyways we
85   * can as well leave this code here.
86   * I.e., simply (and unconditionally) saying
87   *
88   *   msr_value &= ~ppc_interrupt_get_disable_mask();
89   *
90   * would be an alternative.
91   */
92
93  if (!(new_level & CPU_MODES_INTERRUPT_MASK)) {
94    msr_value |= ppc_interrupt_get_disable_mask();
95  }
96  else {
97    msr_value &= ~ppc_interrupt_get_disable_mask();
98  }
99
100  the_context->msr = msr_value;
101
102  /*
103   *  The FP bit of the MSR should only be enabled if this is a floating
104   *  point task.  Unfortunately, the vfprintf_r routine in newlib
105   *  ends up pushing a floating point register regardless of whether or
106   *  not a floating point number is being printed.  Serious restructuring
107   *  of vfprintf.c will be required to avoid this behavior.  At this
108   *  time (7 July 1997), this restructuring is not being done.
109   */
110
111  /* Make sure integer tasks have no FPU access in order to
112   * catch violations. Gcc may implicitely use the FPU and
113   * data corruption may happen.
114   * Since we set the_contex->msr using our current MSR,
115   * we must make sure MSR_FP is off if (!is_fp)...
116   * Unfortunately, this means that users of vfprintf_r have to use FP
117   * tasks or fix vfprintf. Furthermore, users of int-only tasks
118   * must prevent gcc from using the FPU (currently -msoft-float is the
119   * only way...)
120   */
121  if ( is_fp )
122    the_context->msr |= PPC_MSR_FP;
123  else
124    the_context->msr &= ~PPC_MSR_FP;
125
126  the_context->pc = (uint32_t)entry_point;
127
128#if (PPC_ABI == PPC_ABI_SVR4)
129  /*
130   * SVR4 says R2 is for 'system-reserved' use; it cannot hurt to
131   * propagate R2 to all task contexts.
132   */
133  { uint32_t    r2 = 0;
134    unsigned    r13 = 0;
135    asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13)));
136
137    the_context->gpr2 = r2;
138    the_context->gpr13 = r13;
139  }
140#elif (PPC_ABI == PPC_ABI_EABI)
141  { uint32_t    r2 = 0;
142    unsigned    r13 = 0;
143    asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13)));
144
145    the_context->gpr2 = r2;
146    the_context->gpr13 = r13;
147  }
148#else
149#error unsupported PPC_ABI
150#endif
151}
152
153/*PAGE
154 *
155 *  _CPU_Install_interrupt_stack
156 */
157
158void _CPU_Install_interrupt_stack( void )
159{
160}
161
162/*  _CPU_ISR_install_vector
163 *
164 *  This kernel routine installs the RTEMS handler for the
165 *  specified vector.
166 *
167 *  Input parameters:
168 *    vector      - interrupt vector number
169 *    old_handler - former ISR for this vector number
170 *    new_handler - replacement ISR for this vector number
171 *
172 *  Output parameters:  NONE
173 */
174
175void _CPU_ISR_install_vector(
176  uint32_t    vector,
177  proc_ptr    new_handler,
178  proc_ptr   *old_handler
179) 
180{
181  BSP_panic("_CPU_ISR_install_vector called\n");
182}
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