source: rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c @ 5e77d129

4.104.114.84.95
Last change on this file since 5e77d129 was acc25ee, checked in by Joel Sherrill <joel.sherrill@…>, on 12/02/99 at 14:31:19

Merged of mcp750 and mvme2307 BSP by Eric Valette <valette@…>.
As part of this effort, the mpc750 libcpu code is now shared with the
ppc6xx.

  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 *  PowerPC CPU Dependent Source
3 *
4 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
5 *
6 *  COPYRIGHT (c) 1995 by i-cubed ltd.
7 *
8 *  To anyone who acknowledges that this file is provided "AS IS"
9 *  without any express or implied warranty:
10 *      permission to use, copy, modify, and distribute this file
11 *      for any purpose is hereby granted without fee, provided that
12 *      the above copyright notice and this notice appears in all
13 *      copies, and that the name of i-cubed limited not be used in
14 *      advertising or publicity pertaining to distribution of the
15 *      software without specific, written prior permission.
16 *      i-cubed limited makes no representations about the suitability
17 *      of this software for any purpose.
18 *
19 *  Derived from c/src/exec/cpu/no_cpu/cpu.c:
20 *
21 *  COPYRIGHT (c) 1989-1997.
22 *  On-Line Applications Research Corporation (OAR).
23 *  Copyright assigned to U.S. Government, 1994.
24 *
25 *  The license and distribution terms for this file may be found in
26 *  the file LICENSE in this distribution or at
27 *  http://www.OARcorp.com/rtems/license.html.
28 *
29 *  $Id$
30 */
31
32#include <rtems/system.h>
33#include <rtems/score/isr.h>
34#include <rtems/score/context.h>
35#include <rtems/score/thread.h>
36#include <rtems/score/interr.h>
37
38
39/*  _CPU_Initialize
40 *
41 *  This routine performs processor dependent initialization.
42 *
43 *  INPUT PARAMETERS:
44 *    cpu_table       - CPU table to initialize
45 *    thread_dispatch - address of disptaching routine
46 */
47
48void _CPU_Initialize(
49  rtems_cpu_table  *cpu_table,
50  void      (*thread_dispatch)      /* ignored on this CPU */
51)
52{
53  _CPU_Table = *cpu_table;
54}
55
56/*PAGE
57 *
58 *  _CPU_Context_Initialize
59 */
60
61void _CPU_Context_Initialize(
62  Context_Control  *the_context,
63  unsigned32       *stack_base,
64  unsigned32        size,
65  unsigned32        new_level,
66  void             *entry_point,
67  boolean           is_fp
68)
69{
70  unsigned32 msr_value;
71  unsigned32 sp;
72
73  sp = (unsigned32)stack_base + size - CPU_MINIMUM_STACK_FRAME_SIZE;
74  *((unsigned32 *)sp) = 0;
75  the_context->gpr1 = sp;
76   
77  _CPU_MSR_GET( msr_value );
78
79  if (!(new_level & CPU_MODES_INTERRUPT_MASK)) {
80    msr_value |= MSR_EE;
81  }
82  else {
83    msr_value &= ~MSR_EE;
84  }
85
86  the_context->msr = msr_value;
87
88  /*
89   *  The FP bit of the MSR should only be enabled if this is a floating
90   *  point task.  Unfortunately, the vfprintf_r routine in newlib
91   *  ends up pushing a floating point register regardless of whether or
92   *  not a floating point number is being printed.  Serious restructuring
93   *  of vfprintf.c will be required to avoid this behavior.  At this
94   *  time (7 July 1997), this restructuring is not being done.
95   */
96
97  /*if ( is_fp ) */
98    the_context->msr |= PPC_MSR_FP;
99
100  the_context->pc = (unsigned32)entry_point;
101}
102
103
104
105/*PAGE
106 *
107 *  _CPU_Install_interrupt_stack
108 */
109
110void _CPU_Install_interrupt_stack( void )
111{
112}
113
114
115
116
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