source: rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c @ 4216c57

4.104.114.95
Last change on this file since 4216c57 was 4216c57, checked in by Joel Sherrill <joel.sherrill@…>, on 12/04/07 at 22:19:37

2007-12-04 Joel Sherrill <joel.sherrill@…>

  • mpc5xx/console-generic/console-generic.c, mpc8260/timer/timer.c, new-exceptions/cpu.c, old-exceptions/cpu.c: Move interrupt_stack_size field from CPU Table to Configuration Table. Eliminate CPU Table from all ports. Delete references to CPU Table in all forms.
  • Property mode set to 100644
File size: 4.4 KB
Line 
1/*
2 *  PowerPC CPU Dependent Source
3 *
4 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
5 *
6 *  COPYRIGHT (c) 1995 by i-cubed ltd.
7 *
8 *  To anyone who acknowledges that this file is provided "AS IS"
9 *  without any express or implied warranty:
10 *      permission to use, copy, modify, and distribute this file
11 *      for any purpose is hereby granted without fee, provided that
12 *      the above copyright notice and this notice appears in all
13 *      copies, and that the name of i-cubed limited not be used in
14 *      advertising or publicity pertaining to distribution of the
15 *      software without specific, written prior permission.
16 *      i-cubed limited makes no representations about the suitability
17 *      of this software for any purpose.
18 *
19 *  Derived from c/src/exec/cpu/no_cpu/cpu.c:
20 *
21 *  COPYRIGHT (c) 1989-1997.
22 *  On-Line Applications Research Corporation (OAR).
23 *
24 *  The license and distribution terms for this file may be found in
25 *  the file LICENSE in this distribution or at
26 *  http://www.rtems.com/license/LICENSE.
27 *
28 *  $Id$
29 */
30
31#include <rtems/system.h>
32#include <rtems/score/isr.h>
33#include <rtems/score/context.h>
34#include <rtems/score/thread.h>
35#include <rtems/score/interr.h>
36#include <rtems/powerpc/powerpc.h>
37
38/*  _CPU_Initialize
39 *
40 *  This routine performs processor dependent initialization.
41 *
42 *  INPUT PARAMETERS:
43 *    thread_dispatch - address of disptaching routine
44 */
45
46void _CPU_Initialize(
47  void      (*thread_dispatch)      /* ignored on this CPU */
48)
49{
50  {
51    unsigned hasFixed = 0;
52    /* assert that our BSP has fixed PR288 */
53    __asm__ __volatile__ ("mfspr %0, %2":
54                          "=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
55    if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
56      BSP_panic("This BSP needs to fix PR#288");
57    }
58  }
59}
60
61/*PAGE
62 *
63 *  _CPU_Context_Initialize
64 */
65
66void _CPU_Context_Initialize(
67  Context_Control  *the_context,
68  uint32_t         *stack_base,
69  uint32_t          size,
70  uint32_t          new_level,
71  void             *entry_point,
72  boolean           is_fp
73)
74{
75  uint32_t   msr_value;
76  uint32_t   sp;
77
78  sp = (uint32_t)stack_base + size - PPC_MINIMUM_STACK_FRAME_SIZE;
79
80  sp &= ~(CPU_STACK_ALIGNMENT-1);
81
82  *((uint32_t*)sp) = 0;
83  the_context->gpr1 = sp;
84
85  _CPU_MSR_GET( msr_value );
86
87  if (!(new_level & CPU_MODES_INTERRUPT_MASK)) {
88    msr_value |= MSR_EE;
89  }
90  else {
91    msr_value &= ~MSR_EE;
92  }
93
94  the_context->msr = msr_value;
95
96  /*
97   *  The FP bit of the MSR should only be enabled if this is a floating
98   *  point task.  Unfortunately, the vfprintf_r routine in newlib
99   *  ends up pushing a floating point register regardless of whether or
100   *  not a floating point number is being printed.  Serious restructuring
101   *  of vfprintf.c will be required to avoid this behavior.  At this
102   *  time (7 July 1997), this restructuring is not being done.
103   */
104
105  /* Make sure integer tasks have no FPU access in order to
106   * catch violations. Gcc may implicitely use the FPU and
107   * data corruption may happen.
108   * Since we set the_contex->msr using our current MSR,
109   * we must make sure MSR_FP is off if (!is_fp)...
110   * Unfortunately, this means that users of vfprintf_r have to use FP
111   * tasks or fix vfprintf. Furthermore, users of int-only tasks
112   * must prevent gcc from using the FPU (currently -msoft-float is the
113   * only way...)
114   */
115  if ( is_fp )
116    the_context->msr |= PPC_MSR_FP;
117  else
118    the_context->msr &= ~PPC_MSR_FP;
119
120  the_context->pc = (uint32_t)entry_point;
121
122#if (PPC_ABI == PPC_ABI_SVR4)
123  { unsigned    r13 = 0;
124    asm volatile ("mr %0, 13" : "=r" ((r13)));
125
126    the_context->gpr13 = r13;
127  }
128#elif (PPC_ABI == PPC_ABI_EABI)
129  { uint32_t    r2 = 0;
130    unsigned    r13 = 0;
131    asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13)));
132
133    the_context->gpr2 = r2;
134    the_context->gpr13 = r13;
135  }
136#else
137#error unsupported PPC_ABI
138#endif
139}
140
141/*PAGE
142 *
143 *  _CPU_Install_interrupt_stack
144 */
145
146void _CPU_Install_interrupt_stack( void )
147{
148}
149
150/*  _CPU_ISR_install_vector
151 *
152 *  This kernel routine installs the RTEMS handler for the
153 *  specified vector.
154 *
155 *  Input parameters:
156 *    vector      - interrupt vector number
157 *    old_handler - former ISR for this vector number
158 *    new_handler - replacement ISR for this vector number
159 *
160 *  Output parameters:  NONE
161 */
162
163void _CPU_ISR_install_vector(
164  uint32_t    vector,
165  proc_ptr    new_handler,
166  proc_ptr   *old_handler
167)
168{
169  BSP_panic("_CPU_ISR_install_vector called\n");
170}
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