source: rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c @ 21a6869c

4.104.114.84.95
Last change on this file since 21a6869c was 21a6869c, checked in by Ralf Corsepius <ralf.corsepius@…>, on 02/16/05 at 09:07:47

2005-02-15 Ralf Corsepius <ralf.corsepius@…>

  • new-exceptions/cpu.c: Add CPU_MINIMUM_STACK_FRAME_SIZE.
  • Property mode set to 100644
File size: 4.5 KB
Line 
1/*
2 *  PowerPC CPU Dependent Source
3 *
4 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
5 *
6 *  COPYRIGHT (c) 1995 by i-cubed ltd.
7 *
8 *  To anyone who acknowledges that this file is provided "AS IS"
9 *  without any express or implied warranty:
10 *      permission to use, copy, modify, and distribute this file
11 *      for any purpose is hereby granted without fee, provided that
12 *      the above copyright notice and this notice appears in all
13 *      copies, and that the name of i-cubed limited not be used in
14 *      advertising or publicity pertaining to distribution of the
15 *      software without specific, written prior permission.
16 *      i-cubed limited makes no representations about the suitability
17 *      of this software for any purpose.
18 *
19 *  Derived from c/src/exec/cpu/no_cpu/cpu.c:
20 *
21 *  COPYRIGHT (c) 1989-1997.
22 *  On-Line Applications Research Corporation (OAR).
23 *
24 *  The license and distribution terms for this file may be found in
25 *  the file LICENSE in this distribution or at
26 *  http://www.rtems.com/license/LICENSE.
27 *
28 *  $Id$
29 */
30
31#include <rtems/system.h>
32#include <rtems/score/isr.h>
33#include <rtems/score/context.h>
34#include <rtems/score/thread.h>
35#include <rtems/score/interr.h>
36#include <rtems/powerpc/powerpc.h>
37
38/*  _CPU_Initialize
39 *
40 *  This routine performs processor dependent initialization.
41 *
42 *  INPUT PARAMETERS:
43 *    cpu_table       - CPU table to initialize
44 *    thread_dispatch - address of disptaching routine
45 */
46
47void _CPU_Initialize(
48  rtems_cpu_table  *cpu_table,
49  void      (*thread_dispatch)      /* ignored on this CPU */
50)
51{
52  _CPU_Table = *cpu_table;
53
54  { unsigned hasFixed = 0;
55  /* assert that our BSP has fixed PR288 */
56  __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
57  if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
58    BSP_panic("This BSP needs to fix PR#288");
59  }
60  }
61}
62
63/*PAGE
64 *
65 *  _CPU_Context_Initialize
66 */
67
68/* PPC_ABI_SVR4 or PPC_ABI_EABI */
69#define CPU_MINIMUM_STACK_FRAME_SIZE 8
70
71void _CPU_Context_Initialize(
72  Context_Control  *the_context,
73  uint32_t         *stack_base,
74  uint32_t          size,
75  uint32_t          new_level,
76  void             *entry_point,
77  boolean           is_fp
78)
79{
80  uint32_t   msr_value;
81  uint32_t   sp;
82
83  sp = (uint32_t)stack_base + size - CPU_MINIMUM_STACK_FRAME_SIZE;
84
85  sp &= ~(CPU_STACK_ALIGNMENT-1);
86
87  *((uint32_t*)sp) = 0;
88  the_context->gpr1 = sp;
89
90  _CPU_MSR_GET( msr_value );
91
92  if (!(new_level & CPU_MODES_INTERRUPT_MASK)) {
93    msr_value |= MSR_EE;
94  }
95  else {
96    msr_value &= ~MSR_EE;
97  }
98
99  the_context->msr = msr_value;
100
101  /*
102   *  The FP bit of the MSR should only be enabled if this is a floating
103   *  point task.  Unfortunately, the vfprintf_r routine in newlib
104   *  ends up pushing a floating point register regardless of whether or
105   *  not a floating point number is being printed.  Serious restructuring
106   *  of vfprintf.c will be required to avoid this behavior.  At this
107   *  time (7 July 1997), this restructuring is not being done.
108   */
109
110  /* Till Straumann: For deferred FPContext save/restore, make sure integer
111   *                 tasks have no FPU access in order to catch violations.
112   *                 Otherwise, the FP registers may be corrupted.
113   *                             Since we set the_contex->msr using our current MSR,
114   *                             we must make sure MSR_FP is off if (!is_fp)...
115   */
116#if defined(CPU_USE_DEFERRED_FP_SWITCH) && (CPU_USE_DEFERRED_FP_SWITCH==TRUE)
117  if ( is_fp )
118#endif
119    the_context->msr |= PPC_MSR_FP;
120#if defined(CPU_USE_DEFERRED_FP_SWITCH) && (CPU_USE_DEFERRED_FP_SWITCH==TRUE)
121  else
122        the_context->msr &= ~PPC_MSR_FP;
123#endif
124
125  the_context->pc = (uint32_t)entry_point;
126
127#if (PPC_ABI == PPC_ABI_SVR4)
128  { unsigned    r13 = 0;
129    asm volatile ("mr %0, 13" : "=r" ((r13)));
130
131    the_context->gpr13 = r13;
132  }
133#elif (PPC_ABI == PPC_ABI_EABI)
134  { uint32_t    r2 = 0;
135    unsigned    r13 = 0;
136    asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13)));
137
138    the_context->gpr2 = r2;
139    the_context->gpr13 = r13;
140  }
141#else
142#error unsupported PPC_ABI
143#endif
144}
145
146/*PAGE
147 *
148 *  _CPU_Install_interrupt_stack
149 */
150
151void _CPU_Install_interrupt_stack( void )
152{
153}
154
155/*  _CPU_ISR_install_vector
156 *
157 *  This kernel routine installs the RTEMS handler for the
158 *  specified vector.
159 *
160 *  Input parameters:
161 *    vector      - interrupt vector number
162 *    old_handler - former ISR for this vector number
163 *    new_handler - replacement ISR for this vector number
164 *
165 *  Output parameters:  NONE
166 */
167
168void _CPU_ISR_install_vector(
169  uint32_t    vector,
170  proc_ptr    new_handler,
171  proc_ptr   *old_handler
172)
173{
174  BSP_panic("_CPU_ISR_install_vector called\n");
175}
Note: See TracBrowser for help on using the repository browser.