source: rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c @ 022851a

4.115
Last change on this file since 022851a was 022851a, checked in by Sebastian Huber <sebastian.huber@…>, on 01/28/14 at 11:10:08

Add thread-local storage (TLS) support

Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.

  • Property mode set to 100644
File size: 4.1 KB
Line 
1/*
2 *  PowerPC CPU Dependent Source
3 *
4 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
5 *
6 *  COPYRIGHT (c) 1995 by i-cubed ltd.
7 *
8 *  To anyone who acknowledges that this file is provided "AS IS"
9 *  without any express or implied warranty:
10 *      permission to use, copy, modify, and distribute this file
11 *      for any purpose is hereby granted without fee, provided that
12 *      the above copyright notice and this notice appears in all
13 *      copies, and that the name of i-cubed limited not be used in
14 *      advertising or publicity pertaining to distribution of the
15 *      software without specific, written prior permission.
16 *      i-cubed limited makes no representations about the suitability
17 *      of this software for any purpose.
18 *
19 *  Derived from c/src/exec/cpu/no_cpu/cpu.c:
20 *
21 *  COPYRIGHT (c) 1989-1997.
22 *  On-Line Applications Research Corporation (OAR).
23 *
24 *  The license and distribution terms for this file may be found in
25 *  the file LICENSE in this distribution or at
26 *  http://www.rtems.com/license/LICENSE.
27 */
28
29#include <string.h>
30
31#include <rtems/system.h>
32#include <rtems/score/isr.h>
33#include <rtems/score/context.h>
34#include <rtems/score/thread.h>
35#include <rtems/score/interr.h>
36#include <rtems/score/cpu.h>
37#include <rtems/score/tls.h>
38#include <rtems/powerpc/powerpc.h>
39
40/*  _CPU_Initialize
41 *
42 *  This routine performs processor dependent initialization.
43 *
44 *  INPUT PARAMETERS: NONE
45 */
46
47void _CPU_Initialize(void)
48{
49  /* Do nothing */
50#ifdef __ALTIVEC__
51  _CPU_Initialize_altivec();
52#endif
53}
54
55/*PAGE
56 *
57 *  _CPU_Context_Initialize
58 */
59
60void _CPU_Context_Initialize(
61  Context_Control  *the_context,
62  uint32_t         *stack_base,
63  uint32_t          size,
64  uint32_t          new_level,
65  void             *entry_point,
66  bool              is_fp,
67  void             *tls_area
68)
69{
70  ppc_context *the_ppc_context;
71  uint32_t   msr_value;
72  uint32_t   sp;
73
74  sp = (uint32_t)stack_base + size - PPC_MINIMUM_STACK_FRAME_SIZE;
75
76  sp &= ~(CPU_STACK_ALIGNMENT-1);
77
78  *((uint32_t*)sp) = 0;
79
80  _CPU_MSR_GET( msr_value );
81
82  /*
83   * Setting the interrupt mask here is not strictly necessary
84   * since the IRQ level will be established from _Thread_Handler()
85   * again, as soon as the task starts execution.
86   * Because we have to establish a defined state anyways we
87   * can as well leave this code here.
88   * I.e., simply (and unconditionally) saying
89   *
90   *   msr_value &= ~ppc_interrupt_get_disable_mask();
91   *
92   * would be an alternative.
93   */
94
95  if (!(new_level & CPU_MODES_INTERRUPT_MASK)) {
96    msr_value |= ppc_interrupt_get_disable_mask();
97  }
98  else {
99    msr_value &= ~ppc_interrupt_get_disable_mask();
100  }
101
102  /*
103   *  The FP bit of the MSR should only be enabled if this is a floating
104   *  point task.  Unfortunately, the vfprintf_r routine in newlib
105   *  ends up pushing a floating point register regardless of whether or
106   *  not a floating point number is being printed.  Serious restructuring
107   *  of vfprintf.c will be required to avoid this behavior.  At this
108   *  time (7 July 1997), this restructuring is not being done.
109   */
110
111  /* Make sure integer tasks have no FPU access in order to
112   * catch violations. Gcc may implicitely use the FPU and
113   * data corruption may happen.
114   * Since we set the_contex->msr using our current MSR,
115   * we must make sure MSR_FP is off if (!is_fp)...
116   * Unfortunately, this means that users of vfprintf_r have to use FP
117   * tasks or fix vfprintf. Furthermore, users of int-only tasks
118   * must prevent gcc from using the FPU (currently -msoft-float is the
119   * only way...)
120   */
121  if ( is_fp )
122    msr_value |= PPC_MSR_FP;
123  else
124    msr_value &= ~PPC_MSR_FP;
125
126  memset( the_context, 0, sizeof( *the_context ) );
127
128  the_ppc_context = ppc_get_context( the_context );
129  the_ppc_context->gpr1 = sp;
130  the_ppc_context->msr = msr_value;
131  the_ppc_context->lr = (uint32_t) entry_point;
132
133#ifdef __ALTIVEC__
134  _CPU_Context_initialize_altivec( the_ppc_context );
135#endif
136
137  if ( tls_area != NULL ) {
138    void *tls_block = _TLS_TCB_before_tls_block_initialize( tls_area );
139
140    the_ppc_context->gpr2 = (uint32_t) tls_block + 0x7000;
141  } else {
142    register uint32_t gpr2 __asm__("2");
143
144    the_ppc_context->gpr2 = gpr2;
145  }
146}
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