[acc25ee] | 1 | /* |
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| 2 | * PowerPC CPU Dependent Source |
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| 3 | * |
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| 4 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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| 5 | * |
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| 6 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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| 7 | * |
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| 8 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 9 | * without any express or implied warranty: |
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| 10 | * permission to use, copy, modify, and distribute this file |
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| 11 | * for any purpose is hereby granted without fee, provided that |
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| 12 | * the above copyright notice and this notice appears in all |
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| 13 | * copies, and that the name of i-cubed limited not be used in |
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| 14 | * advertising or publicity pertaining to distribution of the |
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| 15 | * software without specific, written prior permission. |
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| 16 | * i-cubed limited makes no representations about the suitability |
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| 17 | * of this software for any purpose. |
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| 18 | * |
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| 19 | * Derived from c/src/exec/cpu/no_cpu/cpu.c: |
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| 20 | * |
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| 21 | * COPYRIGHT (c) 1989-1997. |
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| 22 | * On-Line Applications Research Corporation (OAR). |
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| 23 | * |
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| 24 | * The license and distribution terms for this file may be found in |
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| 25 | * the file LICENSE in this distribution or at |
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[9563a3a] | 26 | * http://www.rtems.com/license/LICENSE. |
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[acc25ee] | 27 | * |
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| 28 | * $Id$ |
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| 29 | */ |
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| 30 | |
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| 31 | #include <rtems/system.h> |
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| 32 | #include <rtems/score/isr.h> |
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| 33 | #include <rtems/score/context.h> |
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| 34 | #include <rtems/score/thread.h> |
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| 35 | #include <rtems/score/interr.h> |
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[3e5a93cc] | 36 | #include <rtems/powerpc/powerpc.h> |
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[acc25ee] | 37 | |
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| 38 | /* _CPU_Initialize |
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| 39 | * |
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| 40 | * This routine performs processor dependent initialization. |
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| 41 | * |
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| 42 | * INPUT PARAMETERS: |
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| 43 | * thread_dispatch - address of disptaching routine |
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| 44 | */ |
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| 45 | |
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| 46 | void _CPU_Initialize( |
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| 47 | void (*thread_dispatch) /* ignored on this CPU */ |
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| 48 | ) |
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| 49 | { |
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[25a92bc1] | 50 | /* Do nothing */ |
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[acc25ee] | 51 | } |
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| 52 | |
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| 53 | /*PAGE |
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| 54 | * |
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| 55 | * _CPU_Context_Initialize |
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| 56 | */ |
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| 57 | |
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[d60239f] | 58 | |
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[acc25ee] | 59 | void _CPU_Context_Initialize( |
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| 60 | Context_Control *the_context, |
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[9347024] | 61 | uint32_t *stack_base, |
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| 62 | uint32_t size, |
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| 63 | uint32_t new_level, |
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[acc25ee] | 64 | void *entry_point, |
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| 65 | boolean is_fp |
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| 66 | ) |
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| 67 | { |
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[9347024] | 68 | uint32_t msr_value; |
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| 69 | uint32_t sp; |
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[acc25ee] | 70 | |
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[cc043dc] | 71 | sp = (uint32_t)stack_base + size - PPC_MINIMUM_STACK_FRAME_SIZE; |
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[ab504d3] | 72 | |
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| 73 | sp &= ~(CPU_STACK_ALIGNMENT-1); |
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| 74 | |
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[9347024] | 75 | *((uint32_t*)sp) = 0; |
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[acc25ee] | 76 | the_context->gpr1 = sp; |
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[6128a4a] | 77 | |
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[acc25ee] | 78 | _CPU_MSR_GET( msr_value ); |
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| 79 | |
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[d60239f] | 80 | /* |
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| 81 | * Setting the interrupt mask here is not strictly necessary |
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| 82 | * since the IRQ level will be established from _Thread_Handler() |
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| 83 | * again, as soon as the task starts execution. |
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| 84 | * Because we have to establish a defined state anyways we |
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| 85 | * can as well leave this code here. |
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| 86 | * I.e., simply (and unconditionally) saying |
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| 87 | * |
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| 88 | * msr_value &= ~ppc_interrupt_get_disable_mask(); |
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| 89 | * |
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| 90 | * would be an alternative. |
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| 91 | */ |
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| 92 | |
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[acc25ee] | 93 | if (!(new_level & CPU_MODES_INTERRUPT_MASK)) { |
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[d60239f] | 94 | msr_value |= ppc_interrupt_get_disable_mask(); |
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[acc25ee] | 95 | } |
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| 96 | else { |
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[d60239f] | 97 | msr_value &= ~ppc_interrupt_get_disable_mask(); |
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[acc25ee] | 98 | } |
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| 99 | |
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| 100 | the_context->msr = msr_value; |
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| 101 | |
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| 102 | /* |
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| 103 | * The FP bit of the MSR should only be enabled if this is a floating |
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[6128a4a] | 104 | * point task. Unfortunately, the vfprintf_r routine in newlib |
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[acc25ee] | 105 | * ends up pushing a floating point register regardless of whether or |
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| 106 | * not a floating point number is being printed. Serious restructuring |
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| 107 | * of vfprintf.c will be required to avoid this behavior. At this |
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| 108 | * time (7 July 1997), this restructuring is not being done. |
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| 109 | */ |
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| 110 | |
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[bbc8785] | 111 | /* Make sure integer tasks have no FPU access in order to |
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| 112 | * catch violations. Gcc may implicitely use the FPU and |
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| 113 | * data corruption may happen. |
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| 114 | * Since we set the_contex->msr using our current MSR, |
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| 115 | * we must make sure MSR_FP is off if (!is_fp)... |
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| 116 | * Unfortunately, this means that users of vfprintf_r have to use FP |
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| 117 | * tasks or fix vfprintf. Furthermore, users of int-only tasks |
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| 118 | * must prevent gcc from using the FPU (currently -msoft-float is the |
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| 119 | * only way...) |
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[830e5f7] | 120 | */ |
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| 121 | if ( is_fp ) |
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[acc25ee] | 122 | the_context->msr |= PPC_MSR_FP; |
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[830e5f7] | 123 | else |
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[bbc8785] | 124 | the_context->msr &= ~PPC_MSR_FP; |
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[acc25ee] | 125 | |
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[9347024] | 126 | the_context->pc = (uint32_t)entry_point; |
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[ab504d3] | 127 | |
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| 128 | #if (PPC_ABI == PPC_ABI_SVR4) |
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| 129 | { unsigned r13 = 0; |
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| 130 | asm volatile ("mr %0, 13" : "=r" ((r13))); |
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[6128a4a] | 131 | |
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[ab504d3] | 132 | the_context->gpr13 = r13; |
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| 133 | } |
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| 134 | #elif (PPC_ABI == PPC_ABI_EABI) |
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[9347024] | 135 | { uint32_t r2 = 0; |
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[ab504d3] | 136 | unsigned r13 = 0; |
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| 137 | asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13))); |
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[6128a4a] | 138 | |
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[ab504d3] | 139 | the_context->gpr2 = r2; |
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| 140 | the_context->gpr13 = r13; |
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| 141 | } |
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| 142 | #else |
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| 143 | #error unsupported PPC_ABI |
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| 144 | #endif |
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[acc25ee] | 145 | } |
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| 146 | |
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| 147 | /*PAGE |
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| 148 | * |
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| 149 | * _CPU_Install_interrupt_stack |
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| 150 | */ |
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| 151 | |
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| 152 | void _CPU_Install_interrupt_stack( void ) |
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| 153 | { |
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| 154 | } |
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[5bd1219] | 155 | |
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| 156 | /* _CPU_ISR_install_vector |
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| 157 | * |
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| 158 | * This kernel routine installs the RTEMS handler for the |
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| 159 | * specified vector. |
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| 160 | * |
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| 161 | * Input parameters: |
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| 162 | * vector - interrupt vector number |
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| 163 | * old_handler - former ISR for this vector number |
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| 164 | * new_handler - replacement ISR for this vector number |
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| 165 | * |
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| 166 | * Output parameters: NONE |
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| 167 | */ |
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| 168 | |
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| 169 | void _CPU_ISR_install_vector( |
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| 170 | uint32_t vector, |
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| 171 | proc_ptr new_handler, |
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| 172 | proc_ptr *old_handler |
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| 173 | ) |
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| 174 | { |
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| 175 | BSP_panic("_CPU_ISR_install_vector called\n"); |
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| 176 | } |
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