[acc25ee] | 1 | /* |
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| 2 | * PowerPC CPU Dependent Source |
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| 3 | * |
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| 4 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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| 5 | * |
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| 6 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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| 7 | * |
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| 8 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 9 | * without any express or implied warranty: |
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| 10 | * permission to use, copy, modify, and distribute this file |
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| 11 | * for any purpose is hereby granted without fee, provided that |
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| 12 | * the above copyright notice and this notice appears in all |
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| 13 | * copies, and that the name of i-cubed limited not be used in |
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| 14 | * advertising or publicity pertaining to distribution of the |
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| 15 | * software without specific, written prior permission. |
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| 16 | * i-cubed limited makes no representations about the suitability |
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| 17 | * of this software for any purpose. |
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| 18 | * |
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| 19 | * Derived from c/src/exec/cpu/no_cpu/cpu.c: |
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| 20 | * |
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| 21 | * COPYRIGHT (c) 1989-1997. |
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| 22 | * On-Line Applications Research Corporation (OAR). |
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| 23 | * |
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| 24 | * The license and distribution terms for this file may be found in |
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| 25 | * the file LICENSE in this distribution or at |
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[9563a3a] | 26 | * http://www.rtems.com/license/LICENSE. |
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[acc25ee] | 27 | * |
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| 28 | * $Id$ |
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| 29 | */ |
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| 30 | |
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| 31 | #include <rtems/system.h> |
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| 32 | #include <rtems/score/isr.h> |
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| 33 | #include <rtems/score/context.h> |
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| 34 | #include <rtems/score/thread.h> |
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| 35 | #include <rtems/score/interr.h> |
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| 36 | |
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| 37 | |
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| 38 | /* _CPU_Initialize |
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| 39 | * |
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| 40 | * This routine performs processor dependent initialization. |
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| 41 | * |
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| 42 | * INPUT PARAMETERS: |
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| 43 | * cpu_table - CPU table to initialize |
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| 44 | * thread_dispatch - address of disptaching routine |
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| 45 | */ |
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| 46 | |
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| 47 | void _CPU_Initialize( |
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| 48 | rtems_cpu_table *cpu_table, |
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| 49 | void (*thread_dispatch) /* ignored on this CPU */ |
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| 50 | ) |
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| 51 | { |
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| 52 | _CPU_Table = *cpu_table; |
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[129b4a79] | 53 | |
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| 54 | { unsigned hasFixed = 0; |
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| 55 | /* assert that our BSP has fixed PR288 */ |
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| 56 | __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0)); |
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| 57 | if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) { |
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| 58 | BSP_panic("This BSP needs to fix PR#288"); |
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| 59 | } |
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| 60 | } |
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[acc25ee] | 61 | } |
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| 62 | |
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| 63 | /*PAGE |
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| 64 | * |
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| 65 | * _CPU_Context_Initialize |
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| 66 | */ |
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| 67 | |
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| 68 | void _CPU_Context_Initialize( |
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| 69 | Context_Control *the_context, |
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[9347024] | 70 | uint32_t *stack_base, |
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| 71 | uint32_t size, |
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| 72 | uint32_t new_level, |
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[acc25ee] | 73 | void *entry_point, |
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| 74 | boolean is_fp |
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| 75 | ) |
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| 76 | { |
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[9347024] | 77 | uint32_t msr_value; |
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| 78 | uint32_t sp; |
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[acc25ee] | 79 | |
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[9347024] | 80 | sp = (uint32_t)stack_base + size - CPU_MINIMUM_STACK_FRAME_SIZE; |
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[ab504d3] | 81 | |
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| 82 | sp &= ~(CPU_STACK_ALIGNMENT-1); |
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| 83 | |
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[9347024] | 84 | *((uint32_t*)sp) = 0; |
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[acc25ee] | 85 | the_context->gpr1 = sp; |
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| 86 | |
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| 87 | _CPU_MSR_GET( msr_value ); |
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| 88 | |
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| 89 | if (!(new_level & CPU_MODES_INTERRUPT_MASK)) { |
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| 90 | msr_value |= MSR_EE; |
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| 91 | } |
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| 92 | else { |
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| 93 | msr_value &= ~MSR_EE; |
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| 94 | } |
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| 95 | |
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| 96 | the_context->msr = msr_value; |
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| 97 | |
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| 98 | /* |
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| 99 | * The FP bit of the MSR should only be enabled if this is a floating |
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| 100 | * point task. Unfortunately, the vfprintf_r routine in newlib |
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| 101 | * ends up pushing a floating point register regardless of whether or |
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| 102 | * not a floating point number is being printed. Serious restructuring |
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| 103 | * of vfprintf.c will be required to avoid this behavior. At this |
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| 104 | * time (7 July 1997), this restructuring is not being done. |
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| 105 | */ |
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| 106 | |
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[830e5f7] | 107 | /* Till Straumann: For deferred FPContext save/restore, make sure integer |
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| 108 | * tasks have no FPU access in order to catch violations. |
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| 109 | * Otherwise, the FP registers may be corrupted. |
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| 110 | * Since we set the_contex->msr using our current MSR, |
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| 111 | * we must make sure MSR_FP is off if (!is_fp)... |
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| 112 | */ |
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| 113 | #if defined(CPU_USE_DEFERRED_FP_SWITCH) && (CPU_USE_DEFERRED_FP_SWITCH==TRUE) |
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| 114 | if ( is_fp ) |
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| 115 | #endif |
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[acc25ee] | 116 | the_context->msr |= PPC_MSR_FP; |
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[830e5f7] | 117 | #if defined(CPU_USE_DEFERRED_FP_SWITCH) && (CPU_USE_DEFERRED_FP_SWITCH==TRUE) |
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| 118 | else |
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| 119 | the_context->msr &= ~PPC_MSR_FP; |
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| 120 | #endif |
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[acc25ee] | 121 | |
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[9347024] | 122 | the_context->pc = (uint32_t)entry_point; |
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[ab504d3] | 123 | |
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| 124 | #if (PPC_ABI == PPC_ABI_SVR4) |
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| 125 | { unsigned r13 = 0; |
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| 126 | asm volatile ("mr %0, 13" : "=r" ((r13))); |
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| 127 | |
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| 128 | the_context->gpr13 = r13; |
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| 129 | } |
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| 130 | #elif (PPC_ABI == PPC_ABI_EABI) |
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[9347024] | 131 | { uint32_t r2 = 0; |
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[ab504d3] | 132 | unsigned r13 = 0; |
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| 133 | asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13))); |
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| 134 | |
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| 135 | the_context->gpr2 = r2; |
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| 136 | the_context->gpr13 = r13; |
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| 137 | } |
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| 138 | #else |
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| 139 | #error unsupported PPC_ABI |
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| 140 | #endif |
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[acc25ee] | 141 | } |
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| 142 | |
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| 143 | |
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| 144 | |
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| 145 | /*PAGE |
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| 146 | * |
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| 147 | * _CPU_Install_interrupt_stack |
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| 148 | */ |
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| 149 | |
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| 150 | void _CPU_Install_interrupt_stack( void ) |
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| 151 | { |
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| 152 | } |
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| 153 | |
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