[8ef3818] | 1 | /* timer.c |
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| 2 | * |
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| 3 | * This file manages the interval timer on the PowerPC MPC8xx. |
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| 4 | * NOTE: This is not the PIT, but rather the RTEMS interval |
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| 5 | * timer |
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| 6 | * We shall use the bottom 32 bits of the timebase register, |
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| 7 | * |
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| 8 | * The following was in the 403 version of this file. I don't |
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| 9 | * know what it means. JTM 5/19/98 |
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| 10 | * NOTE: It is important that the timer start/stop overhead be |
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| 11 | * determined when porting or modifying this code. |
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| 12 | * |
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| 13 | * Author: Jay Monkman (jmonkman@frasca.com) |
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| 14 | * Copywright (C) 1998 by Frasca International, Inc. |
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| 15 | * |
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| 16 | * Derived from c/src/lib/libcpu/ppc/ppc403/timer/timer.c: |
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| 17 | * |
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| 18 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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| 19 | * |
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| 20 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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| 21 | * |
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| 22 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 23 | * without any express or implied warranty: |
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| 24 | * permission to use, copy, modify, and distribute this file |
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| 25 | * for any purpose is hereby granted without fee, provided that |
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| 26 | * the above copyright notice and this notice appears in all |
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| 27 | * copies, and that the name of i-cubed limited not be used in |
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| 28 | * advertising or publicity pertaining to distribution of the |
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| 29 | * software without specific, written prior permission. |
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| 30 | * i-cubed limited makes no representations about the suitability |
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| 31 | * of this software for any purpose. |
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| 32 | * |
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| 33 | * Derived from c/src/lib/libcpu/hppa1_1/timer/timer.c: |
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| 34 | * |
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[c4cc8199] | 35 | * COPYRIGHT (c) 1989-2007. |
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[8ef3818] | 36 | * On-Line Applications Research Corporation (OAR). |
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| 37 | * |
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| 38 | * The license and distribution terms for this file may be |
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| 39 | * found in the file LICENSE in this distribution or at |
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[21e1c44] | 40 | * http://www.rtems.com/license/LICENSE. |
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[8ef3818] | 41 | * |
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| 42 | * $Id$ |
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| 43 | */ |
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| 44 | |
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| 45 | #include <rtems.h> |
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| 46 | #include <mpc8xx.h> |
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| 47 | |
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[66c373bf] | 48 | static volatile uint32_t Timer_starting; |
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[3942cce] | 49 | static bool benchmark_timer_find_average_overhead; |
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[d1dde59] | 50 | extern uint32_t bsp_timer_least_valid; |
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| 51 | extern uint32_t bsp_timer_average_overhead; |
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[8ef3818] | 52 | |
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| 53 | /* |
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| 54 | * This is so small that this code will be reproduced where needed. |
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| 55 | */ |
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[66c373bf] | 56 | static inline uint32_t get_itimer(void) |
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[8ef3818] | 57 | { |
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[66c373bf] | 58 | uint32_t ret; |
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[8ef3818] | 59 | |
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| 60 | asm volatile ("mftb %0" : "=r" ((ret))); /* TBLO */ |
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| 61 | |
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| 62 | return ret; |
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| 63 | } |
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| 64 | |
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[6427f1a] | 65 | void benchmark_timer_initialize(void) |
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[8ef3818] | 66 | { |
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| 67 | /* set interrupt level and enable timebase. This should never */ |
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| 68 | /* generate an interrupt however. */ |
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| 69 | m8xx.tbscr |= M8xx_TBSCR_TBIRQ(4) | M8xx_TBSCR_TBE; |
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| 70 | |
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| 71 | Timer_starting = get_itimer(); |
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| 72 | } |
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| 73 | |
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[6427f1a] | 74 | int benchmark_timer_read(void) |
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[8ef3818] | 75 | { |
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[66c373bf] | 76 | uint32_t clicks; |
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| 77 | uint32_t total; |
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[8ef3818] | 78 | |
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| 79 | clicks = get_itimer(); |
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| 80 | |
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| 81 | total = clicks - Timer_starting; |
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| 82 | |
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[6427f1a] | 83 | if ( benchmark_timer_find_average_overhead == 1 ) |
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[8ef3818] | 84 | return total; /* in XXX microsecond units */ |
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| 85 | else { |
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[c4cc8199] | 86 | if ( total < bsp_timer_least_valid ) { |
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[8ef3818] | 87 | return 0; /* below timer resolution */ |
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| 88 | } |
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[c4cc8199] | 89 | return (total - bsp_timer_average_overhead); |
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[8ef3818] | 90 | } |
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| 91 | } |
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| 92 | |
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[3942cce] | 93 | void benchmark_timer_disable_subtracting_average_overhead(bool find_flag) |
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[8ef3818] | 94 | { |
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[6427f1a] | 95 | benchmark_timer_find_average_overhead = find_flag; |
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[8ef3818] | 96 | } |
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