4.104.114.84.95
Last change
on this file since 8ef3818 was
8ef3818,
checked in by Joel Sherrill <joel.sherrill@…>, on 06/12/00 at 19:57:02
|
Patch from John Cotton <john.cotton@…>, Charles-Antoine Gauthier
<charles.gauthier@…>, and Darlene A. Stewart
<Darlene.Stewart@…> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860
|
-
Property mode set to
100644
|
File size:
732 bytes
|
Line | |
---|
1 | /* |
---|
2 | * cp.c |
---|
3 | * |
---|
4 | * MPC8xx CPM RISC Communication Processor routines. |
---|
5 | * |
---|
6 | * Based on code (alloc860.c in eth_comm port) by |
---|
7 | * Jay Monkman (jmonkman@frasca.com), |
---|
8 | * which, in turn, is based on code by |
---|
9 | * W. Eric Norum (eric@skatter.usask.ca). |
---|
10 | * |
---|
11 | * Modifications by Darlene Stewart (Darlene.Stewart@iit.nrc.ca): |
---|
12 | * Copyright (c) 1999, National Research Council of Canada |
---|
13 | */ |
---|
14 | |
---|
15 | #include <bsp.h> |
---|
16 | #include <rtems/rtems/intr.h> |
---|
17 | #include <rtems/error.h> |
---|
18 | |
---|
19 | /* |
---|
20 | * Send a command to the CPM RISC processer |
---|
21 | */ |
---|
22 | void m8xx_cp_execute_cmd( unsigned16 command ) |
---|
23 | { |
---|
24 | rtems_unsigned16 lvl; |
---|
25 | |
---|
26 | rtems_interrupt_disable(lvl); |
---|
27 | while (m8xx.cpcr & M8xx_CR_FLG) { |
---|
28 | continue; |
---|
29 | } |
---|
30 | |
---|
31 | m8xx.cpcr = command | M8xx_CR_FLG; |
---|
32 | rtems_interrupt_enable (lvl); |
---|
33 | } |
---|
34 | |
---|
Note: See
TracBrowser
for help on using the repository browser.