source: rtems/c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c @ 8ef3818

4.104.114.84.95
Last change on this file since 8ef3818 was 8ef3818, checked in by Joel Sherrill <joel.sherrill@…>, on 06/12/00 at 19:57:02

Patch from John Cotton <john.cotton@…>, Charles-Antoine Gauthier
<charles.gauthier@…>, and Darlene A. Stewart
<Darlene.Stewart@…> to add support for a number of very
significant things:

+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040

and PowerPC

+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use

same code base.

+ Rework of eth_comm BSP to utiltize above.

John reports this works on the 821 and 860

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/*  clock.c
2 *
3 *  This routine initializes the PIT on the MPC8xx.
4 *  The tick frequency is specified by the bsp.
5 *
6 *  Author: Jay Monkman (jmonkman@frasca.com)
7 *  Copyright (C) 1998 by Frasca International, Inc.
8 *
9 *  Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
10 *
11 *  Author: Andrew Bray <andy@i-cubed.co.uk>
12 *
13 *  COPYRIGHT (c) 1995 by i-cubed ltd.
14 *
15 *  To anyone who acknowledges that this file is provided "AS IS"
16 *  without any express or implied warranty:
17 *      permission to use, copy, modify, and distribute this file
18 *      for any purpose is hereby granted without fee, provided that
19 *      the above copyright notice and this notice appears in all
20 *      copies, and that the name of i-cubed limited not be used in
21 *      advertising or publicity pertaining to distribution of the
22 *      software without specific, written prior permission.
23 *      i-cubed limited makes no representations about the suitability
24 *      of this software for any purpose.
25 *
26 *  Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c:
27 *
28 *  COPYRIGHT (c) 1989-1998.
29 *  On-Line Applications Research Corporation (OAR).
30 *  Copyright assigned to U.S. Government, 1994.
31 *
32 *  The license and distribution terms for this file may be
33 *  found in the file LICENSE in this distribution or at
34 *  http://www.OARcorp.com/rtems/license.html.
35 *
36 *  $Id$
37 */
38
39#include <bsp.h>
40#include <clockdrv.h>
41#include <rtems/libio.h>
42
43#include <stdlib.h>                     /* for atexit() */
44#include <mpc8xx.h>
45
46extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
47
48volatile rtems_unsigned32 Clock_driver_ticks;
49extern volatile m8xx_t m8xx;
50
51void Clock_exit( void );
52 
53/*
54 * These are set by clock driver during its init
55 */
56 
57rtems_device_major_number rtems_clock_major = ~0;
58rtems_device_minor_number rtems_clock_minor;
59 
60/*
61 *  ISR Handler
62 */
63rtems_isr Clock_isr(rtems_vector_number vector)
64{
65  m8xx.piscr |= M8xx_PISCR_PS;
66  Clock_driver_ticks++;
67  rtems_clock_tick();
68}
69
70void Install_clock(rtems_isr_entry clock_isr)
71{
72#ifdef EPPCBUG_SMC1
73  extern unsigned32 simask_copy;
74#endif /* EPPCBUG_SMC1 */
75 
76  rtems_isr_entry previous_isr;
77  rtems_unsigned32 pit_value;
78 
79  Clock_driver_ticks = 0;
80 
81  pit_value = (BSP_Configuration.microseconds_per_tick *
82               Cpu_table.clicks_per_usec) - 1 ;
83 
84  if (pit_value > 0xffff) {           /* pit is only 16 bits long */
85    rtems_fatal_error_occurred(-1);
86  } 
87  if (BSP_Configuration.ticks_per_timeslice) {
88   
89    /*
90     * initialize the interval here
91     * First tick is set to right amount of time in the future
92     * Future ticks will be incremented over last value set
93     * in order to provide consistent clicks in the face of
94     * interrupt overhead
95     */
96   
97    rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
98   
99    m8xx.sccr &= ~(1<<24);
100    m8xx.pitc = pit_value;
101   
102    /* set PIT irq level, enable PIT, PIT interrupts */
103    /*  and clear int. status */
104    m8xx.piscr = M8xx_PISCR_PIRQ(0) |
105      M8xx_PISCR_PTE | M8xx_PISCR_PS | M8xx_PISCR_PIE;
106   
107#ifdef EPPCBUG_SMC1
108    simask_copy = m8xx.simask | M8xx_SIMASK_LVM0;
109#endif /* EPPCBUG_SMC1 */
110    m8xx.simask |= M8xx_SIMASK_LVM0;
111  }
112  atexit(Clock_exit);
113}
114
115void
116ReInstall_clock(rtems_isr_entry new_clock_isr)
117{
118  rtems_isr_entry previous_isr;
119  rtems_unsigned32 isrlevel = 0;
120 
121  rtems_interrupt_disable(isrlevel);
122 
123  rtems_interrupt_catch(new_clock_isr, PPC_IRQ_LVL0, &previous_isr);
124 
125  rtems_interrupt_enable(isrlevel);
126}
127
128
129/*
130 * Called via atexit()
131 * Remove the clock interrupt handler by setting handler to NULL
132 */
133void
134Clock_exit(void)
135{
136  if ( BSP_Configuration.ticks_per_timeslice ) {
137    /* disable PIT and PIT interrupts */
138    m8xx.piscr &= ~(M8xx_PISCR_PTE | M8xx_PISCR_PIE);
139   
140    (void) set_vector(0, PPC_IRQ_LVL0, 1);
141  }
142}
143
144rtems_device_driver Clock_initialize(
145  rtems_device_major_number major,
146  rtems_device_minor_number minor,
147  void *pargp
148)
149{
150  Install_clock( Clock_isr );
151 
152  /*
153   * make major/minor avail to others such as shared memory driver
154   */
155 
156  rtems_clock_major = major;
157  rtems_clock_minor = minor;
158 
159  return RTEMS_SUCCESSFUL;
160}
161 
162rtems_device_driver Clock_control(
163  rtems_device_major_number major,
164  rtems_device_minor_number minor,
165  void *pargp
166)
167{
168  rtems_libio_ioctl_args_t *args = pargp;
169 
170  if (args == 0)
171    goto done;
172 
173  /*
174   * This is hokey, but until we get a defined interface
175   * to do this, it will just be this simple...
176   */
177 
178  if (args->command == rtems_build_name('I', 'S', 'R', ' ')) {
179    Clock_isr(PPC_IRQ_LVL0);
180  }
181  else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) {
182    ReInstall_clock(args->buffer);
183  }
184 
185 done:
186  return RTEMS_SUCCESSFUL;
187}
188
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