source: rtems/c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c @ 61bd0301

4.104.114.84.95
Last change on this file since 61bd0301 was 61bd0301, checked in by Joel Sherrill <joel.sherrill@…>, on Jun 14, 2000 at 3:52:24 PM

Moved PowerPC cache management code to libcpu. Also compiled
mpc8xx libcpu support for the first time and remove includes
of bsp.h, references to BSP_Configuration, and Cpu_table. All
of these can be obtained directly from RTEMS now.

  • Property mode set to 100644
File size: 4.4 KB
Line 
1/*  clock.c
2 *
3 *  This routine initializes the PIT on the MPC8xx.
4 *  The tick frequency is specified by the bsp.
5 *
6 *  Author: Jay Monkman (jmonkman@frasca.com)
7 *  Copyright (C) 1998 by Frasca International, Inc.
8 *
9 *  Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
10 *
11 *  Author: Andrew Bray <andy@i-cubed.co.uk>
12 *
13 *  COPYRIGHT (c) 1995 by i-cubed ltd.
14 *
15 *  To anyone who acknowledges that this file is provided "AS IS"
16 *  without any express or implied warranty:
17 *      permission to use, copy, modify, and distribute this file
18 *      for any purpose is hereby granted without fee, provided that
19 *      the above copyright notice and this notice appears in all
20 *      copies, and that the name of i-cubed limited not be used in
21 *      advertising or publicity pertaining to distribution of the
22 *      software without specific, written prior permission.
23 *      i-cubed limited makes no representations about the suitability
24 *      of this software for any purpose.
25 *
26 *  Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c:
27 *
28 *  COPYRIGHT (c) 1989-1998.
29 *  On-Line Applications Research Corporation (OAR).
30 *  Copyright assigned to U.S. Government, 1994.
31 *
32 *  The license and distribution terms for this file may be
33 *  found in the file LICENSE in this distribution or at
34 *  http://www.OARcorp.com/rtems/license.html.
35 *
36 *  $Id$
37 */
38
39#include <rtems.h>
40#include <clockdrv.h>
41#include <rtems/libio.h>
42
43#include <stdlib.h>                     /* for atexit() */
44#include <mpc8xx.h>
45
46volatile rtems_unsigned32 Clock_driver_ticks;
47extern volatile m8xx_t m8xx;
48
49void Clock_exit( void );
50 
51/*
52 * These are set by clock driver during its init
53 */
54 
55rtems_device_major_number rtems_clock_major = ~0;
56rtems_device_minor_number rtems_clock_minor;
57 
58/*
59 *  ISR Handler
60 */
61rtems_isr Clock_isr(rtems_vector_number vector)
62{
63  m8xx.piscr |= M8xx_PISCR_PS;
64  Clock_driver_ticks++;
65  rtems_clock_tick();
66}
67
68void Install_clock(rtems_isr_entry clock_isr)
69{
70#ifdef EPPCBUG_SMC1
71  extern unsigned32 simask_copy;
72#endif /* EPPCBUG_SMC1 */
73 
74  rtems_isr_entry previous_isr;
75  rtems_unsigned32 pit_value;
76 
77  Clock_driver_ticks = 0;
78 
79  pit_value = (rtems_configuration_get_microseconds_per_tick() *
80               rtems_cpu_configuration_get_clicks_per_usec()) - 1 ;
81 
82  if (pit_value > 0xffff) {           /* pit is only 16 bits long */
83    rtems_fatal_error_occurred(-1);
84  } 
85
86  /*
87   * initialize the interval here
88   * First tick is set to right amount of time in the future
89   * Future ticks will be incremented over last value set
90   * in order to provide consistent clicks in the face of
91   * interrupt overhead
92   */
93 
94  rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
95 
96  m8xx.sccr &= ~(1<<24);
97  m8xx.pitc = pit_value;
98 
99  /* set PIT irq level, enable PIT, PIT interrupts */
100  /*  and clear int. status */
101  m8xx.piscr = M8xx_PISCR_PIRQ(0) |
102    M8xx_PISCR_PTE | M8xx_PISCR_PS | M8xx_PISCR_PIE; 
103   
104#ifdef EPPCBUG_SMC1
105  simask_copy = m8xx.simask | M8xx_SIMASK_LVM0;
106#endif /* EPPCBUG_SMC1 */
107  m8xx.simask |= M8xx_SIMASK_LVM0;
108  atexit(Clock_exit);
109}
110
111void
112ReInstall_clock(rtems_isr_entry new_clock_isr)
113{
114  rtems_isr_entry previous_isr;
115  rtems_unsigned32 isrlevel = 0;
116 
117  rtems_interrupt_disable(isrlevel);
118 
119  rtems_interrupt_catch(new_clock_isr, PPC_IRQ_LVL0, &previous_isr);
120 
121  rtems_interrupt_enable(isrlevel);
122}
123
124
125/*
126 * Called via atexit()
127 * Remove the clock interrupt handler by setting handler to NULL
128 */
129void
130Clock_exit(void)
131{
132  /* disable PIT and PIT interrupts */
133  m8xx.piscr &= ~(M8xx_PISCR_PTE | M8xx_PISCR_PIE); 
134 
135  (void) set_vector(0, PPC_IRQ_LVL0, 1);
136}
137
138rtems_device_driver Clock_initialize(
139  rtems_device_major_number major,
140  rtems_device_minor_number minor,
141  void *pargp
142)
143{
144  Install_clock( Clock_isr );
145 
146  /*
147   * make major/minor avail to others such as shared memory driver
148   */
149 
150  rtems_clock_major = major;
151  rtems_clock_minor = minor;
152 
153  return RTEMS_SUCCESSFUL;
154}
155 
156rtems_device_driver Clock_control(
157  rtems_device_major_number major,
158  rtems_device_minor_number minor,
159  void *pargp
160)
161{
162  rtems_libio_ioctl_args_t *args = pargp;
163 
164  if (args == 0)
165    goto done;
166 
167  /*
168   * This is hokey, but until we get a defined interface
169   * to do this, it will just be this simple...
170   */
171 
172  if (args->command == rtems_build_name('I', 'S', 'R', ' ')) {
173    Clock_isr(PPC_IRQ_LVL0);
174  }
175  else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) {
176    ReInstall_clock(args->buffer);
177  }
178 
179 done:
180  return RTEMS_SUCCESSFUL;
181}
182
Note: See TracBrowser for help on using the repository browser.