source: rtems/c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c @ 24b6d2f

Last change on this file since 24b6d2f was 24b6d2f, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 5, 2005 at 2:34:17 AM

2005-09-12 Thomas Doerfler <Thomas.Doerfler@…>

PR 527/bsps
PR 822/bsps

  • mpc8xx/clock/clock.c: Currently the MBX8xx BSP does not boot, because some logical errors are in the startup code. Additionally, the mpc8xx shared clock driver does not support the clocking scheme of some of the board variants, which are clocked from a 32768Hz (!) external crystal.
  • Property mode set to 100644
File size: 4.7 KB
Line 
1/*  clock.c
2 *
3 *  This routine initializes the PIT on the MPC8xx.
4 *  The tick frequency is specified by the bsp.
5 *
6 *  Author: Jay Monkman (jmonkman@frasca.com)
7 *  Copyright (C) 1998 by Frasca International, Inc.
8 *
9 *  Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
10 *
11 *  Author: Andrew Bray <andy@i-cubed.co.uk>
12 *
13 *  COPYRIGHT (c) 1995 by i-cubed ltd.
14 *
15 *  To anyone who acknowledges that this file is provided "AS IS"
16 *  without any express or implied warranty:
17 *      permission to use, copy, modify, and distribute this file
18 *      for any purpose is hereby granted without fee, provided that
19 *      the above copyright notice and this notice appears in all
20 *      copies, and that the name of i-cubed limited not be used in
21 *      advertising or publicity pertaining to distribution of the
22 *      software without specific, written prior permission.
23 *      i-cubed limited makes no representations about the suitability
24 *      of this software for any purpose.
25 *
26 *  Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c:
27 *
28 *  COPYRIGHT (c) 1989-1998.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.rtems.com/license/LICENSE.
34 *
35 *  $Id$
36 */
37
38#include <rtems.h>
39#include <clockdrv.h>
40#include <rtems/libio.h>
41
42#include <stdlib.h>                     /* for atexit() */
43#include <mpc8xx.h>
44
45volatile rtems_unsigned32 Clock_driver_ticks;
46extern volatile m8xx_t m8xx;
47extern int BSP_get_clock_irq_level();
48extern int BSP_connect_clock_handler(rtems_isr_entry);
49extern int BSP_disconnect_clock_handler();
50
51void Clock_exit( void );
52
53/*
54 * These are set by clock driver during its init
55 */
56 
57rtems_device_major_number rtems_clock_major = ~0;
58rtems_device_minor_number rtems_clock_minor;
59 
60/*
61 *  ISR Handler
62 */
63rtems_isr Clock_isr(rtems_vector_number vector)
64{
65  m8xx.piscr |= M8xx_PISCR_PS;
66  Clock_driver_ticks++;
67  rtems_clock_tick();
68}
69
70void clockOn(void* unused)
71{
72  unsigned desiredLevel;
73  rtems_unsigned32 pit_value;
74  rtems_unsigned32 mf_value;
75  rtems_unsigned32 extclk_value;
76 
77  if (rtems_cpu_configuration_get_clicks_per_usec() == 0) {
78    /*
79     * oscclk is too low for PIT, compute extclk and derive PIT from there
80     */
81    mf_value  = m8xx.plprcr >> 20;
82    pit_value = (_CPU_Table.clock_speed
83                 / (mf_value+1) 
84                 / 4
85                 * rtems_configuration_get_microseconds_per_tick()
86                 / 1000000);
87    m8xx.sccr |=  (1<<24);
88  }
89  else {
90    pit_value = (rtems_configuration_get_microseconds_per_tick() *
91                 rtems_cpu_configuration_get_clicks_per_usec());
92 
93    m8xx.sccr &= ~(1<<24);
94  }
95  if (pit_value > (0xffff+1)) {
96    /*
97     * try to activate prescaler
98     * NOTE: divider generates odd values now...
99     */
100    pit_value = pit_value / 128;
101    m8xx.sccr |= (1<<25);
102  }
103  if (pit_value > (0xffff+1)) {           /* pit is only 16 bits long */
104    rtems_fatal_error_occurred(-1);
105  }
106  m8xx.pitc = pit_value - 1;
107
108  desiredLevel = BSP_get_clock_irq_level();
109  /* set PIT irq level, enable PIT, PIT interrupts */
110  /*  and clear int. status */
111  m8xx.piscr = M8xx_PISCR_PIRQ(desiredLevel) |
112    M8xx_PISCR_PTE | M8xx_PISCR_PS | M8xx_PISCR_PIE;
113}
114/*
115 * Called via atexit()
116 * Remove the clock interrupt handler by setting handler to NULL
117 */
118void
119clockOff(void* unused)
120{
121  /* disable PIT and PIT interrupts */
122  m8xx.piscr &= ~(M8xx_PISCR_PTE | M8xx_PISCR_PIE); 
123}
124
125int clockIsOn(void* unused)
126{
127  if (m8xx.piscr & M8xx_PISCR_PIE) return 1;
128  return 0;
129}
130
131/*
132 * Called via atexit()
133 * Remove the clock interrupt handler by setting handler to NULL
134 */
135void
136Clock_exit(void)
137{
138  (void) BSP_disconnect_clock_handler ();
139}
140
141void Install_clock(rtems_isr_entry clock_isr)
142{
143  Clock_driver_ticks = 0;
144
145  BSP_connect_clock_handler (clock_isr);
146  atexit(Clock_exit);
147}
148
149void
150ReInstall_clock(rtems_isr_entry new_clock_isr)
151{
152  BSP_connect_clock_handler (new_clock_isr);
153}
154
155
156rtems_device_driver Clock_initialize(
157  rtems_device_major_number major,
158  rtems_device_minor_number minor,
159  void *pargp
160)
161{
162  Install_clock( Clock_isr );
163 
164  /*
165   * make major/minor avail to others such as shared memory driver
166   */
167 
168  rtems_clock_major = major;
169  rtems_clock_minor = minor;
170 
171  return RTEMS_SUCCESSFUL;
172}
173 
174rtems_device_driver Clock_control(
175  rtems_device_major_number major,
176  rtems_device_minor_number minor,
177  void *pargp
178)
179{
180  rtems_libio_ioctl_args_t *args = pargp;
181 
182  if (args == 0)
183    goto done;
184 
185  /*
186   * This is hokey, but until we get a defined interface
187   * to do this, it will just be this simple...
188   */
189 
190  if (args->command == rtems_build_name('I', 'S', 'R', ' ')) {
191    Clock_isr(PPC_IRQ_LVL0);
192  }
193  else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) {
194    ReInstall_clock(args->buffer);
195  }
196 
197 done:
198  return RTEMS_SUCCESSFUL;
199}
200
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