[8ef3818] | 1 | /* clock.c |
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| 2 | * |
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| 3 | * This routine initializes the PIT on the MPC8xx. |
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| 4 | * The tick frequency is specified by the bsp. |
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| 5 | * |
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| 6 | * Author: Jay Monkman (jmonkman@frasca.com) |
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| 7 | * Copyright (C) 1998 by Frasca International, Inc. |
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| 8 | * |
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| 9 | * Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c: |
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| 10 | * |
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| 11 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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| 12 | * |
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| 13 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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| 14 | * |
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| 15 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 16 | * without any express or implied warranty: |
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| 17 | * permission to use, copy, modify, and distribute this file |
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| 18 | * for any purpose is hereby granted without fee, provided that |
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| 19 | * the above copyright notice and this notice appears in all |
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| 20 | * copies, and that the name of i-cubed limited not be used in |
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| 21 | * advertising or publicity pertaining to distribution of the |
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| 22 | * software without specific, written prior permission. |
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| 23 | * i-cubed limited makes no representations about the suitability |
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| 24 | * of this software for any purpose. |
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| 25 | * |
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| 26 | * Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c: |
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| 27 | * |
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[c4cc8199] | 28 | * COPYRIGHT (c) 1989-2007. |
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[8ef3818] | 29 | * On-Line Applications Research Corporation (OAR). |
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| 30 | * |
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| 31 | * The license and distribution terms for this file may be |
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| 32 | * found in the file LICENSE in this distribution or at |
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[21e1c44] | 33 | * http://www.rtems.com/license/LICENSE. |
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[8ef3818] | 34 | * |
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| 35 | * $Id$ |
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| 36 | */ |
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| 37 | |
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[61bd0301] | 38 | #include <rtems.h> |
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[11c2382] | 39 | #include <rtems/clockdrv.h> |
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[8ef3818] | 40 | #include <rtems/libio.h> |
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[e1df032] | 41 | #include <rtems/powerpc/powerpc.h> |
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[8ef3818] | 42 | |
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| 43 | #include <stdlib.h> /* for atexit() */ |
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| 44 | #include <mpc8xx.h> |
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| 45 | |
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[66c373bf] | 46 | volatile uint32_t Clock_driver_ticks; |
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[8ef3818] | 47 | extern volatile m8xx_t m8xx; |
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[37731c2b] | 48 | extern int BSP_get_clock_irq_level(); |
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| 49 | extern int BSP_connect_clock_handler(rtems_isr_entry); |
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| 50 | extern int BSP_disconnect_clock_handler(); |
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[8ef3818] | 51 | |
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| 52 | void Clock_exit( void ); |
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[37731c2b] | 53 | |
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[8ef3818] | 54 | /* |
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| 55 | * These are set by clock driver during its init |
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| 56 | */ |
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| 57 | |
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| 58 | rtems_device_major_number rtems_clock_major = ~0; |
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| 59 | rtems_device_minor_number rtems_clock_minor; |
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| 60 | |
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| 61 | /* |
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| 62 | * ISR Handler |
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| 63 | */ |
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| 64 | rtems_isr Clock_isr(rtems_vector_number vector) |
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| 65 | { |
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| 66 | m8xx.piscr |= M8xx_PISCR_PS; |
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| 67 | Clock_driver_ticks++; |
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| 68 | rtems_clock_tick(); |
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| 69 | } |
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| 70 | |
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[37731c2b] | 71 | void clockOn(void* unused) |
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[8ef3818] | 72 | { |
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[37731c2b] | 73 | unsigned desiredLevel; |
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[66c373bf] | 74 | uint32_t pit_value; |
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[fb6bc245] | 75 | uint32_t mf_value; |
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[0130f653] | 76 | rtems_boolean force_prescaler = FALSE; |
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[c4cc8199] | 77 | extern uint32_t bsp_clicks_per_usec; |
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| 78 | extern uint32_t bsp_clock_speed; |
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| 79 | |
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| 80 | if (bsp_clicks_per_usec == 0) { |
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[0130f653] | 81 | /* |
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| 82 | * oscclk is too low for PIT, compute extclk and derive PIT from there |
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| 83 | */ |
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| 84 | mf_value = m8xx.plprcr >> 20; |
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[c4cc8199] | 85 | pit_value = (bsp_clock_speed |
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[0130f653] | 86 | / (mf_value+1) |
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| 87 | / 1000 |
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| 88 | / 4 |
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| 89 | * rtems_configuration_get_microseconds_per_tick() |
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| 90 | / 1000); |
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| 91 | m8xx.sccr |= (1<<23); |
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| 92 | force_prescaler = TRUE; |
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| 93 | } |
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| 94 | else { |
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| 95 | pit_value = (rtems_configuration_get_microseconds_per_tick() * |
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[c4cc8199] | 96 | bsp_clicks_per_usec); |
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[8ef3818] | 97 | |
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[0130f653] | 98 | m8xx.sccr &= ~(1<<23); |
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| 99 | } |
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| 100 | if ((pit_value > 0xffff) || force_prescaler){ |
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| 101 | /* |
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| 102 | * try to activate prescaler |
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| 103 | * NOTE: divider generates odd values now... |
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| 104 | */ |
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| 105 | pit_value = pit_value / 128; |
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| 106 | m8xx.sccr |= (1<<24); |
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| 107 | } |
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| 108 | else { |
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| 109 | m8xx.sccr &= ~(1<<24); |
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| 110 | } |
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| 111 | |
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[8ef3818] | 112 | if (pit_value > 0xffff) { /* pit is only 16 bits long */ |
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| 113 | rtems_fatal_error_occurred(-1); |
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[37731c2b] | 114 | } |
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[0130f653] | 115 | m8xx.pitc = pit_value - 1; |
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[37731c2b] | 116 | |
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| 117 | desiredLevel = BSP_get_clock_irq_level(); |
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[61bd0301] | 118 | /* set PIT irq level, enable PIT, PIT interrupts */ |
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| 119 | /* and clear int. status */ |
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[37731c2b] | 120 | m8xx.piscr = M8xx_PISCR_PIRQ(desiredLevel) | |
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| 121 | M8xx_PISCR_PTE | M8xx_PISCR_PS | M8xx_PISCR_PIE; |
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[8ef3818] | 122 | } |
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[37731c2b] | 123 | /* |
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| 124 | * Called via atexit() |
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| 125 | * Remove the clock interrupt handler by setting handler to NULL |
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| 126 | */ |
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[8ef3818] | 127 | void |
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[37731c2b] | 128 | clockOff(void* unused) |
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[8ef3818] | 129 | { |
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[37731c2b] | 130 | /* disable PIT and PIT interrupts */ |
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| 131 | m8xx.piscr &= ~(M8xx_PISCR_PTE | M8xx_PISCR_PIE); |
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[8ef3818] | 132 | } |
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| 133 | |
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[37731c2b] | 134 | int clockIsOn(void* unused) |
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| 135 | { |
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| 136 | if (m8xx.piscr & M8xx_PISCR_PIE) return 1; |
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| 137 | return 0; |
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| 138 | } |
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[8ef3818] | 139 | |
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| 140 | /* |
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| 141 | * Called via atexit() |
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| 142 | * Remove the clock interrupt handler by setting handler to NULL |
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| 143 | */ |
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| 144 | void |
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| 145 | Clock_exit(void) |
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| 146 | { |
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[37731c2b] | 147 | (void) BSP_disconnect_clock_handler (); |
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[8ef3818] | 148 | } |
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| 149 | |
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[37731c2b] | 150 | void Install_clock(rtems_isr_entry clock_isr) |
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| 151 | { |
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| 152 | Clock_driver_ticks = 0; |
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| 153 | |
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| 154 | BSP_connect_clock_handler (clock_isr); |
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| 155 | atexit(Clock_exit); |
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| 156 | } |
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| 157 | |
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| 158 | void |
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| 159 | ReInstall_clock(rtems_isr_entry new_clock_isr) |
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| 160 | { |
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| 161 | BSP_connect_clock_handler (new_clock_isr); |
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| 162 | } |
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| 163 | |
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| 164 | |
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[8ef3818] | 165 | rtems_device_driver Clock_initialize( |
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| 166 | rtems_device_major_number major, |
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| 167 | rtems_device_minor_number minor, |
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| 168 | void *pargp |
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| 169 | ) |
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| 170 | { |
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| 171 | Install_clock( Clock_isr ); |
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[37731c2b] | 172 | |
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[8ef3818] | 173 | /* |
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| 174 | * make major/minor avail to others such as shared memory driver |
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| 175 | */ |
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| 176 | |
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| 177 | rtems_clock_major = major; |
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| 178 | rtems_clock_minor = minor; |
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| 179 | |
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| 180 | return RTEMS_SUCCESSFUL; |
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| 181 | } |
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| 182 | |
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| 183 | rtems_device_driver Clock_control( |
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| 184 | rtems_device_major_number major, |
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| 185 | rtems_device_minor_number minor, |
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| 186 | void *pargp |
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| 187 | ) |
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| 188 | { |
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| 189 | rtems_libio_ioctl_args_t *args = pargp; |
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| 190 | |
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| 191 | if (args == 0) |
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| 192 | goto done; |
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| 193 | |
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| 194 | /* |
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| 195 | * This is hokey, but until we get a defined interface |
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| 196 | * to do this, it will just be this simple... |
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| 197 | */ |
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| 198 | |
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| 199 | if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { |
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| 200 | Clock_isr(PPC_IRQ_LVL0); |
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| 201 | } |
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| 202 | else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) { |
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| 203 | ReInstall_clock(args->buffer); |
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| 204 | } |
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| 205 | |
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| 206 | done: |
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| 207 | return RTEMS_SUCCESSFUL; |
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| 208 | } |
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