source: rtems/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.S @ ae55da72

4.115
Last change on this file since ae55da72 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on 05/03/12 at 15:09:24

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

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File size: 5.3 KB
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1/*
2 * vectors.S
3 *
4 *  This file contains the assembly code for the PowerPC exception veneers
5 *  for RTEMS.
6 *
7 *
8 *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
9 *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
10 *
11 *  Derived from libbsp/powerpc/mbx8xx/vectors/vectors.S,
12 *
13 *  (c) 1999, Eric Valette valette@crf.canon.fr
14 */
15
16#include <rtems/asm.h>
17#include <rtems/score/cpu.h>
18#include <libcpu/vectors.h>
19
20#define SYNC \
21        sync; \
22        isync
23
24
25/*
26 * Hardware exception vector table.
27 *
28 * The MPC555 can be configured to use a compressed vector table with 8
29 * bytes per entry, rather than the usual 0x100 bytes of other PowerPC
30 * devices.  The following macro uses this feature to save the better part
31 * of 8 kbytes of flash ROM.
32 *
33 * Each vector table entry has room for only a simple branch instruction
34 * which branches to a prologue specific to that exception.  This
35 * exception-specific prologue begins the context save, loads the exception
36 * number into a register, and jumps to a common exception prologue, below.
37 */
38
39        .macro  vectors num=0, total=NUM_EXCEPTIONS  /* create vector table */
40
41/* vector table entry */
42        .section .vectors, "ax"
43
44        ba      specific_prologue\@             /* run specific prologue */
45        .long   0                               /* each entry is 8 bytes */
46
47/* exception-specific prologue */
48        .text
49
50specific_prologue\@:
51        stwu    r1, -EXCEPTION_FRAME_END(r1)    /* open stack frame */
52        stw     r4, GPR4_OFFSET(r1)             /* preserve register */
53        li      r4, \num                        /* get exception number */
54        b       common_prologue                 /* run common prologue */
55
56/* invoke macro recursively to create remainder of table */
57        .if     \total - (\num + 1)
58        vectors "(\num + 1)", \total
59        .endif
60
61        .endm
62
63
64/* invoke macro to create entire vector table */
65        vectors
66
67
68/*
69 * Common exception prologue.
70 *
71 * Because the MPC555 vector table is in flash ROM, it's not possible to
72 * change the exception handlers by overwriting them at run-time, so this
73 * common exception prologue uses a table of exception handler pointers to
74 * provide equivalent flexibility.
75 *
76 * When the actual exception handler is run, R1 points to the base of a new
77 * exception stack frame, in which R3, R4 and LR have been saved.  R4 holds
78 * the exception number.
79 */
80        .text
81
82common_prologue:
83        stw     r3, GPR3_OFFSET(r1)             /* preserve registers */
84        mflr    r3
85        stw     r3, EXC_LR_OFFSET(r1)
86
87        slwi    r3, r4, 2                               /* make table offset */
88        addis   r3, r3, exception_handler_table@ha      /* point to entry */
89        addi    r3, r3, exception_handler_table@l
90        lwz     r3, 0(r3)                               /* get entry */
91        mtlr    r3                                      /* run it */
92        blr
93
94
95/*
96 * Default exception handler.
97 *
98 * The function initialize_exceptions() initializes all of the entries in
99 * the exception handler table with pointers to this routine, which saves
100 * the remainder of the interrupted code's state, then calls
101 * C_default_exception_handler() to dump registers.
102 *
103 * On entry, R1 points to a new exception stack frame in which R3, R4, and
104 * LR have been saved.  R4 holds the exception number.
105 */
106        .text
107
108PUBLIC_VAR(default_exception_handler)
109SYM (default_exception_handler):
110        /*
111         * Save the interrupted code's program counter and MSR.  Beyond this
112         * point, all exceptions are recoverable.  Use an RCPU-specific SPR
113         * to set the RI bit in the MSR to indicate the recoverable state.
114         */
115        mfsrr0  r3
116        stw     r3, SRR0_FRAME_OFFSET(r1)
117        mfsrr1  r3
118        stw     r3, SRR1_FRAME_OFFSET(r1)
119
120        mtspr   eid, r3                 /* set MSR[RI], clear MSR[EE] */
121        SYNC
122
123        /*
124         * Save the remainder of the general-purpose registers.
125         *
126         * Compute the value of R1 at exception entry before storing it in
127         * the frame.
128         *
129         * Note that R2 should never change (it's the EABI pointer to
130         * .sdata2), but we save it just in case.
131         *
132         * Recall that R3 and R4 were saved by the specific- and
133         * common-exception handlers before entry to this routine.
134         */
135        stw     r0, GPR0_OFFSET(r1)
136        addi    r0, r1, EXCEPTION_FRAME_END
137        stw     r0, GPR1_OFFSET(r1)
138        stw     r2, GPR2_OFFSET(r1)
139        stmw    r5, GPR5_OFFSET(r1)             /* save R5 to R31 */
140
141        /*
142         * Save the remainder of the UISA special-purpose registers.  Recall
143         * that LR was saved before entry.
144         */
145        mfcr    r0
146        stw     r0,  EXC_CR_OFFSET(r1)
147        mfctr   r0
148        stw     r0,  EXC_CTR_OFFSET(r1)
149        mfxer   r0
150        stw     r0,  EXC_XER_OFFSET(r1)
151
152        /*
153         * Call C-language portion of the default exception handler, passing
154         * in the address of the frame.
155         *
156         * To simplify things a bit, we assume that the target routine is
157         * within +/- 32 Mbyte from here, which is a reasonable assumption
158         * on the MPC555.
159         */
160        stw     r4, EXCEPTION_NUMBER_OFFSET(r1) /* save exception number */
161        addi    r3, r1, 0x8                     /* get frame address */
162        bl      C_default_exception_handler     /* call handler */
163
164        /*
165         * Restore UISA special-purpose registers.
166         */
167        lwz     r0,  EXC_XER_OFFSET(r1)
168        mtxer   r0
169        lwz     r0,  EXC_CTR_OFFSET(r1)
170        mtctr   r0
171        lwz     r0,  EXC_CR_OFFSET(r1)
172        mtcr    r0
173        lwz     r0,  EXC_LR_OFFSET(r1)
174        mtlr    r0
175
176        /*
177         * Restore most general-purpose registers.
178         */
179        lmw     r2, GPR2_OFFSET(r1)
180
181        /*
182         * Restore the interrupted code's program counter and MSR, but first
183         * use an RCPU-specific special-purpose register to clear the RI
184         * bit, indicating that exceptions are temporarily non-recoverable.
185         */
186        mtspr   nri, r0                 /* clear MSR[RI] */
187        SYNC
188
189        lwz     r0, SRR1_FRAME_OFFSET(r1)
190        mtsrr1  r0
191        lwz     r0, SRR0_FRAME_OFFSET(r1)
192        mtsrr0  r0
193
194        /*
195         * Restore the final GPR, close the stack frame, and return to the
196         * interrupted code.
197         */
198        lwz     r0, GPR0_OFFSET(r1)
199        addi    r1, r1, EXCEPTION_FRAME_END
200        SYNC
201        rfi
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