source: rtems/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.S @ 73b5bd5d

4.104.114.84.95
Last change on this file since 73b5bd5d was 297d99b1, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 13, 2004 at 2:58:07 PM

2004-04-13 Ralf Corsepius <ralf_corsepius@…>

  • mpc5xx/clock/clock.c, mpc5xx/irq/irq_asm.S, mpc5xx/vectors/vectors.S: Reflect new locations of cpukit headers.
  • Property mode set to 100644
File size: 5.4 KB
Line 
1/*
2 * vectors.S
3 *
4 *  This file contains the assembly code for the PowerPC exception veneers
5 *  for RTEMS.
6 *
7 *
8 *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
9 *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
10 *
11 *  Derived from libbsp/powerpc/mbx8xx/vectors/vectors.S,
12 *
13 *  (c) 1999, Eric Valette valette@crf.canon.fr
14 *
15 *  $Id$
16 */
17       
18#include <rtems/asm.h>
19#include <rtems/score/cpu.h>
20#include <libcpu/vectors.h>
21
22#define SYNC \
23        sync; \
24        isync
25       
26
27/*
28 * Hardware exception vector table.
29 *
30 * The MPC555 can be configured to use a compressed vector table with 8
31 * bytes per entry, rather than the usual 0x100 bytes of other PowerPC
32 * devices.  The following macro uses this feature to save the better part
33 * of 8 kbytes of flash ROM.
34 *
35 * Each vector table entry has room for only a simple branch instruction
36 * which branches to a prologue specific to that exception.  This
37 * exception-specific prologue begins the context save, loads the exception
38 * number into a register, and jumps to a common exception prologue, below.
39 */
40
41        .macro  vectors num=0, total=NUM_EXCEPTIONS  /* create vector table */
42
43/* vector table entry */
44        .section .vectors, "ax"
45
46        ba      specific_prologue\@             /* run specific prologue */
47        .long   0                               /* each entry is 8 bytes */
48
49/* exception-specific prologue */
50        .text
51
52specific_prologue\@:
53        stwu    r1, -EXCEPTION_FRAME_END(r1)    /* open stack frame */
54        stw     r4, GPR4_OFFSET(r1)             /* preserve register */
55        li      r4, \num                        /* get exception number */
56        b       common_prologue                 /* run common prologue */
57
58/* invoke macro recursively to create remainder of table */
59        .if     \total - (\num + 1)
60        vectors "(\num + 1)", \total
61        .endif
62
63        .endm
64
65
66/* invoke macro to create entire vector table */
67        vectors
68
69
70/*
71 * Common exception prologue.
72 *
73 * Because the MPC555 vector table is in flash ROM, it's not possible to
74 * change the exception handlers by overwriting them at run-time, so this
75 * common exception prologue uses a table of exception handler pointers to
76 * provide equivalent flexibility.
77 *
78 * When the actual exception handler is run, R1 points to the base of a new
79 * exception stack frame, in which R3, R4 and LR have been saved.  R4 holds
80 * the exception number.
81 */
82        .text
83
84common_prologue:
85        stw     r3, GPR3_OFFSET(r1)             /* preserve registers */
86        mflr    r3
87        stw     r3, EXC_LR_OFFSET(r1)
88
89        slwi    r3, r4, 2                               /* make table offset */
90        addis   r3, r3, exception_handler_table@ha      /* point to entry */
91        addi    r3, r3, exception_handler_table@l
92        lwz     r3, 0(r3)                               /* get entry */
93        mtlr    r3                                      /* run it */
94        blr
95       
96
97/*
98 * Default exception handler.
99 *
100 * The function initialize_exceptions() initializes all of the entries in
101 * the exception handler table with pointers to this routine, which saves
102 * the remainder of the interrupted code's state, then calls
103 * C_default_exception_handler() to dump registers.
104 *
105 * On entry, R1 points to a new exception stack frame in which R3, R4, and
106 * LR have been saved.  R4 holds the exception number.
107 */
108        .text
109               
110PUBLIC_VAR(default_exception_handler)
111SYM (default_exception_handler):
112        /*
113         * Save the interrupted code's program counter and MSR.  Beyond this
114         * point, all exceptions are recoverable.  Use an RCPU-specific SPR
115         * to set the RI bit in the MSR to indicate the recoverable state.
116         */
117        mfsrr0  r3
118        stw     r3, SRR0_FRAME_OFFSET(r1)
119        mfsrr1  r3
120        stw     r3, SRR1_FRAME_OFFSET(r1)
121
122        mtspr   eid, r3                 /* set MSR[RI], clear MSR[EE] */
123        SYNC
124
125        /*
126         * Save the remainder of the general-purpose registers.
127         *
128         * Compute the value of R1 at exception entry before storing it in
129         * the frame.
130         *
131         * Note that R2 should never change (it's the EABI pointer to
132         * .sdata2), but we save it just in case. 
133         *
134         * Recall that R3 and R4 were saved by the specific- and
135         * common-exception handlers before entry to this routine.
136         */
137        stw     r0, GPR0_OFFSET(r1)
138        addi    r0, r1, EXCEPTION_FRAME_END
139        stw     r0, GPR1_OFFSET(r1)
140        stw     r2, GPR2_OFFSET(r1)
141        stmw    r5, GPR5_OFFSET(r1)             /* save R5 to R31 */
142
143        /*
144         * Save the remainder of the UISA special-purpose registers.  Recall
145         * that LR was saved before entry.
146         */
147        mfcr    r0
148        stw     r0,  EXC_CR_OFFSET(r1)
149        mfctr   r0
150        stw     r0,  EXC_CTR_OFFSET(r1)
151        mfxer   r0
152        stw     r0,  EXC_XER_OFFSET(r1)
153
154        /*
155         * Call C-language portion of the default exception handler, passing
156         * in the address of the frame. 
157         *
158         * To simplify things a bit, we assume that the target routine is
159         * within +/- 32 Mbyte from here, which is a reasonable assumption
160         * on the MPC555.
161         */
162        stw     r4, EXCEPTION_NUMBER_OFFSET(r1) /* save exception number */
163        addi    r3, r1, 0x8                     /* get frame address */
164        bl      C_default_exception_handler     /* call handler */
165
166        /*
167         * Restore UISA special-purpose registers.
168         */
169        lwz     r0,  EXC_XER_OFFSET(r1)
170        mtxer   r0
171        lwz     r0,  EXC_CTR_OFFSET(r1)
172        mtctr   r0
173        lwz     r0,  EXC_CR_OFFSET(r1)
174        mtcr    r0
175        lwz     r0,  EXC_LR_OFFSET(r1)
176        mtlr    r0
177
178        /*
179         * Restore most general-purpose registers.
180         */
181        lmw     r2, GPR2_OFFSET(r1)
182
183        /*
184         * Restore the interrupted code's program counter and MSR, but first
185         * use an RCPU-specific special-purpose register to clear the RI
186         * bit, indicating that exceptions are temporarily non-recoverable.
187         */
188        mtspr   nri, r0                 /* clear MSR[RI] */
189        SYNC
190
191        lwz     r0, SRR1_FRAME_OFFSET(r1)
192        mtsrr1  r0
193        lwz     r0, SRR0_FRAME_OFFSET(r1)
194        mtsrr0  r0
195       
196        /*
197         * Restore the final GPR, close the stack frame, and return to the
198         * interrupted code.
199         */
200        lwz     r0, GPR0_OFFSET(r1)
201        addi    r1, r1, EXCEPTION_FRAME_END
202        SYNC
203        rfi
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