source: rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.h @ 7735271

4.104.114.84.95
Last change on this file since 7735271 was 7735271, checked in by Jennifer Averett <Jennifer.Averett@…>, on Apr 25, 2005 at 2:37:10 PM

2005-04-25 Jennifer Averett <jennifer.averett@…>

PR 779/bsp

  • mpc5xx/console-generic/console-generic.c, mpc5xx/irq/irq.c, mpc5xx/irq/irq.h, mpc5xx/irq/irq_init.c: Add parameter to powerpc interrupt handler routines
  • Property mode set to 100644
File size: 11.0 KB
Line 
1/*
2 * irq.h
3 *
4 *  This include file describe the data structure and the functions implemented
5 *  by rtems to write interrupt handlers.
6 *
7 *
8 *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
9 *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
10 *
11 *  Derived from libbsp/powerpc/mbx8xx/irq/irq.h:
12 *
13 *  CopyRight (C) 1999 valette@crf.canon.fr
14 *
15 *  This code is heavilly inspired by the public specification of STREAM V2
16 *  that can be found at :
17 *
18 *      <http://www.chorus.com/Documentation/index.html> by following
19 *  the STREAM API Specification Document link.
20 *
21 *  The license and distribution terms for this file may be
22 *  found in found in the file LICENSE in this distribution or at
23 *  http://www.rtems.com/license/LICENSE.
24 *
25 *  $Id$
26 */
27
28#ifndef _LIBCPU_IRQ_H
29#define _LIBCPU_IRQ_H
30
31
32#define CPU_ASM_IRQ_VECTOR_BASE 0x0
33
34#ifndef ASM
35
36extern volatile unsigned int ppc_cached_irq_mask;
37
38/*
39 * Symblolic IRQ names and related definitions.
40 */
41
42typedef enum {
43  /*
44   * Base vector for our USIU IRQ handlers.
45   */
46  CPU_USIU_VECTOR_BASE          = CPU_ASM_IRQ_VECTOR_BASE,
47  /*
48   * USIU IRQ handler related definitions
49   */
50  CPU_USIU_IRQ_COUNT            = 16, /* 16 reserved but in the future... */
51  CPU_USIU_IRQ_MIN_OFFSET       = 0,
52  CPU_USIU_IRQ_MAX_OFFSET       = CPU_USIU_IRQ_MIN_OFFSET + CPU_USIU_IRQ_COUNT - 1,
53  /*
54   * UIMB IRQ handlers related definitions
55   */
56  CPU_UIMB_IRQ_COUNT            = 32 - 8, /* first 8 overlap USIU */
57  CPU_UIMB_IRQ_MIN_OFFSET       = CPU_USIU_IRQ_COUNT + CPU_USIU_VECTOR_BASE,
58  CPU_UIMB_IRQ_MAX_OFFSET       = CPU_UIMB_IRQ_MIN_OFFSET + CPU_UIMB_IRQ_COUNT - 1,
59  /*
60   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
61   * handler might be connected
62   */
63  CPU_PROC_IRQ_COUNT            = 1,
64  CPU_PROC_IRQ_MIN_OFFSET       = CPU_UIMB_IRQ_MAX_OFFSET + 1,
65  CPU_PROC_IRQ_MAX_OFFSET       = CPU_PROC_IRQ_MIN_OFFSET + CPU_PROC_IRQ_COUNT - 1,
66  /*
67   * Summary
68   */
69  CPU_IRQ_COUNT                 = CPU_PROC_IRQ_MAX_OFFSET + 1,
70  CPU_MIN_OFFSET                = CPU_USIU_IRQ_MIN_OFFSET,
71  CPU_MAX_OFFSET                = CPU_PROC_IRQ_MAX_OFFSET,
72  /*
73   * USIU IRQ symbolic name definitions.
74   */         
75  CPU_USIU_EXT_IRQ_0            = CPU_USIU_IRQ_MIN_OFFSET,
76  CPU_USIU_INT_IRQ_0,
77
78  CPU_USIU_EXT_IRQ_1,
79  CPU_USIU_INT_IRQ_1,
80
81  CPU_USIU_EXT_IRQ_2,
82  CPU_USIU_INT_IRQ_2,
83 
84  CPU_USIU_EXT_IRQ_3,
85  CPU_USIU_INT_IRQ_3,
86 
87  CPU_USIU_EXT_IRQ_4,
88  CPU_USIU_INT_IRQ_4,
89
90  CPU_USIU_EXT_IRQ_5,
91  CPU_USIU_INT_IRQ_5,
92 
93  CPU_USIU_EXT_IRQ_6,
94  CPU_USIU_INT_IRQ_6,
95 
96  CPU_USIU_EXT_IRQ_7,
97  CPU_USIU_INT_IRQ_7,
98
99  /*
100   * Symbolic names for UISU interrupt sources.
101   */
102  CPU_PERIODIC_TIMER            = CPU_USIU_INT_IRQ_6,
103  CPU_UIMB_INTERRUPT            = CPU_USIU_INT_IRQ_7,
104             
105  /*
106   * UIMB IRQ symbolic name definitions.  The first 8 sources are aliases to
107   * the USIU interrupts of the same number, because they are detected in
108   * the USIU pending register rather than the UIMB pending register.
109   */
110  CPU_UIMB_IRQ_0                = CPU_USIU_INT_IRQ_0,
111  CPU_UIMB_IRQ_1                = CPU_USIU_INT_IRQ_1,
112  CPU_UIMB_IRQ_2                = CPU_USIU_INT_IRQ_2,
113  CPU_UIMB_IRQ_3                = CPU_USIU_INT_IRQ_3,
114  CPU_UIMB_IRQ_4                = CPU_USIU_INT_IRQ_4,
115  CPU_UIMB_IRQ_5                = CPU_USIU_INT_IRQ_5,
116  CPU_UIMB_IRQ_6                = CPU_USIU_INT_IRQ_6,
117  CPU_UIMB_IRQ_7                = CPU_USIU_INT_IRQ_7,
118
119  CPU_UIMB_IRQ_8                = CPU_UIMB_IRQ_MIN_OFFSET,
120  CPU_UIMB_IRQ_9,
121  CPU_UIMB_IRQ_10,
122  CPU_UIMB_IRQ_11,
123  CPU_UIMB_IRQ_12,
124  CPU_UIMB_IRQ_13,
125  CPU_UIMB_IRQ_14,
126  CPU_UIMB_IRQ_15,
127  CPU_UIMB_IRQ_16,
128  CPU_UIMB_IRQ_17,
129  CPU_UIMB_IRQ_18,
130  CPU_UIMB_IRQ_19,
131  CPU_UIMB_IRQ_20,
132  CPU_UIMB_IRQ_21,
133  CPU_UIMB_IRQ_22,
134  CPU_UIMB_IRQ_23,
135  CPU_UIMB_IRQ_24,
136  CPU_UIMB_IRQ_25,
137  CPU_UIMB_IRQ_26,
138  CPU_UIMB_IRQ_27,
139  CPU_UIMB_IRQ_28,
140  CPU_UIMB_IRQ_29,
141  CPU_UIMB_IRQ_30,
142  CPU_UIMB_IRQ_31,
143 
144  /*
145   * Symbolic names for UIMB interrupt sources.
146   */
147  CPU_IRQ_SCI                   = CPU_UIMB_IRQ_5,
148
149  /*
150   * Processor exceptions handled as rtems IRQ symbolic name definitions.
151   */
152  CPU_DECREMENTER               = CPU_PROC_IRQ_MIN_OFFSET
153     
154}rtems_irq_symbolic_name;
155
156/*
157 * Convert an rtems_irq_symbolic_name constant to an interrupt level
158 * suitable for programming into an I/O device's interrupt level field.
159 */
160int CPU_irq_level_from_symbolic_name(const rtems_irq_symbolic_name name);
161
162/*
163 * Type definition for RTEMS managed interrupts
164 */
165typedef unsigned char  rtems_irq_prio;
166struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
167
168typedef void *rtems_irq_hdl_param;
169typedef void (*rtems_irq_hdl)           (rtems_irq_hdl_param);
170typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
171typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
172typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
173
174typedef struct __rtems_irq_connect_data__ {
175  /*
176   * IRQ line
177   */
178  rtems_irq_symbolic_name       name;
179  /*
180   * Handler. See comment on handler properties below in function prototype.
181   */
182  rtems_irq_hdl                 hdl;
183  /*
184   * Handler handle to store private data
185   */
186   rtems_irq_hdl_param          handle;
187  /*
188   * Function for enabling interrupts at device level (ONLY!).
189   * The CPU code will automatically enable it at USIU level and UIMB level.
190   * RATIONALE : anyway such code has to exist in current driver code.
191   * It is usually called immediately AFTER connecting the interrupt handler.
192   * RTEMS may well need such a function when restoring normal interrupt
193   * processing after a debug session.
194   *
195   */
196    rtems_irq_enable            on;     
197  /*
198   * Function for disabling interrupts at device level (ONLY!).
199   * The code will disable it at USIU and UIMB level. RATIONALE : anyway
200   * such code has to exist for clean shutdown. It is usually called
201   * BEFORE disconnecting the interrupt. RTEMS may well need such
202   * a function when disabling normal interrupt processing for
203   * a debug session. May well be a NOP function.
204   */
205  rtems_irq_disable             off;
206  /*
207   * Function enabling to know what interrupt may currently occur
208   * if someone manipulates the USIU and UIMB interrupt mask without care...
209   */
210  rtems_irq_is_enabled          isOn;
211}rtems_irq_connect_data;
212
213typedef struct {
214  /*
215   * size of all the table fields (*Tbl) described below.
216   */
217  unsigned int                  irqNb;
218  /*
219   * Default handler used when disconnecting interrupts.
220   */
221  rtems_irq_connect_data        defaultEntry;
222  /*
223   * Table containing initials/current value.
224   */
225  rtems_irq_connect_data*       irqHdlTbl;
226  /*
227   * actual value of CPU_USIU_IRQ_VECTOR_BASE...
228   */
229  rtems_irq_symbolic_name       irqBase;
230  /*
231   * software priorities associated with interrupts.
232   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that 
233   * interrupt handler hdl connected for interrupt name i
234   * will  not be interrupted by the handler connected for interrupt j
235   * The interrupt source  will be physically masked at USIU and UIMB level.
236   */
237  rtems_irq_prio*               irqPrioTbl;
238}rtems_irq_global_settings;
239
240
241/*-------------------------------------------------------------------------+
242| Function Prototypes.
243+--------------------------------------------------------------------------*/
244
245#if 0
246/*
247 * -------------------- MPC5xx USIU Management Routines -----------------
248 */
249/*
250 * Function to disable a particular irq at USIU level.  After calling
251 * this function, even if the device asserts the interrupt line it will
252 * not be propagated further to the processor
253 */
254int CPU_irq_disable_at_usiu     (const rtems_irq_symbolic_name irqLine);
255/*
256 * Function to enable a particular irq at USIU level.  After calling
257 * this function, if the device asserts the interrupt line it will
258 * be propagated further to the processor
259 */
260int CPU_irq_enable_at_usiu      (const rtems_irq_symbolic_name irqLine);
261/*
262 * Function to acknowledge a particular irq at USIU level.  After calling
263 * this function, if a device asserts an enabled interrupt line it will
264 * be propagated further to the processor. Mainly useful for people
265 * writing raw handlers as this is automagically done for rtems managed
266 * handlers.
267 */
268int CPU_irq_ack_at_siu          (const rtems_irq_symbolic_name irqLine);
269/*
270 * function to check if a particular irq is enabled at USIU level.
271 */
272int CPU_irq_enabled_at_siu      (const rtems_irq_symbolic_name irqLine);
273
274#endif
275
276/*
277 * ------------ RTEMS Single Irq Handler Management Routines ----------------
278 */
279/*
280 * Function to connect a particular irq handler. This handler will NOT be
281 * called directly as the result of the corresponding interrupt. Instead, a
282 * RTEMS irq prologue will be called that will :
283 *
284 *      1) save the C scratch registers,
285 *      2) switch to a interrupt stack if the interrupt is not nested,
286 *      4) modify them to disable the current interrupt at  USIU level (and
287 *         maybe others depending on software priorities)
288 *      5) aknowledge the USIU',
289 *      6) demask the processor,
290 *      7) call the application handler
291 *
292 * As a result the hdl function provided
293 *
294 *      a) can perfectly be written is C,
295 *      b) may also well directly call the part of the RTEMS API that can be
296 *         used from interrupt level,
297 *      c) It only responsible for handling the jobs that need to be done at
298 *         the device level including (aknowledging/re-enabling the
299 *         interrupt at device, level, getting the data,...)
300 *
301 *      When returning from the function, the following will be performed by
302 *      the RTEMS irq epilogue :
303 *
304 *      1) masks the interrupts again,
305 *      2) restore the original USIU interrupt masks
306 *      3) switch back on the orinal stack if needed,
307 *      4) perform rescheduling when necessary,
308 *      5) restore the C scratch registers...
309 *      6) restore initial execution flow
310 *
311 */
312int CPU_install_rtems_irq_handler       (const rtems_irq_connect_data*);
313/*
314 * Function to connect an RTEMS irq handler for ptr->name.
315 */
316int CPU_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
317/*
318 * Function to get the RTEMS irq handler for ptr->name.
319 */
320int CPU_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
321/*
322 * Function to disconnect the RTEMS irq handler for ptr->name.  This
323 * function checks that the value given is the current one for safety
324 * reason.  The user can use the previous function to get it.
325 */
326
327/*
328 * ------------ RTEMS Global Irq Handler Management Routines ----------------
329 */
330/*
331 * (Re) Initialize the RTEMS interrupt management.
332 *
333 * The result of calling this function will be the same as if each
334 * individual handler (config->irqHdlTbl[i].hdl) different from
335 * "config->defaultEntry.hdl" has been individualy connected via
336 *
337 *      CPU_install_rtems_irq_handler(&config->irqHdlTbl[i])
338 *
339 * and each handler currently equal to config->defaultEntry.hdl
340 * has been previously disconnected via
341 *
342 *       CPU_remove_rtems_irq_handler (&config->irqHdlTbl[i])
343 *
344 * This is to say that all information given will be used and not just
345 * only the space.
346 *
347 * CAUTION : the various table address contained in config will be used
348 *           directly by the interrupt mangement code in order to save
349 *           data size so they must stay valid after the call => they should
350 *           not be modified or declared on a stack.
351 */
352
353int CPU_rtems_irq_mngt_set(rtems_irq_global_settings* config);
354/*
355 * (Re) get info on current RTEMS interrupt management.
356 */
357int CPU_rtems_irq_mngt_get(rtems_irq_global_settings**);
358 
359extern void CPU_rtems_irq_mng_init(unsigned cpuId);
360
361#endif
362
363#endif
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