1 | /* |
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2 | * irq.h |
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3 | * |
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4 | * This include file describe the data structure and the functions implemented |
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5 | * by rtems to write interrupt handlers. |
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6 | * |
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7 | * |
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8 | * MPC5xx port sponsored by Defence Research and Development Canada - Suffield |
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9 | * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) |
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10 | * |
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11 | * Derived from libbsp/powerpc/mbx8xx/irq/irq.h: |
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12 | * |
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13 | * CopyRight (C) 1999 valette@crf.canon.fr |
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14 | * |
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15 | * This code is heavilly inspired by the public specification of STREAM V2 |
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16 | * that can be found at : |
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17 | * |
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18 | * <http://www.chorus.com/Documentation/index.html> by following |
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19 | * the STREAM API Specification Document link. |
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20 | * |
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21 | * The license and distribution terms for this file may be |
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22 | * found in found in the file LICENSE in this distribution or at |
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23 | * http://www.rtems.com/license/LICENSE. |
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24 | * |
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25 | * $Id$ |
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26 | */ |
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27 | |
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28 | #ifndef LIBCPU_POWERPC_MBX8XX_IRQ_IRQ_H |
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29 | #define LIBCPU_POWERPC_MBX8XX_IRQ_IRQ_H |
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30 | |
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31 | |
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32 | #define CPU_ASM_IRQ_VECTOR_BASE 0x0 |
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33 | |
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34 | #ifndef ASM |
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35 | |
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36 | extern volatile unsigned int ppc_cached_irq_mask; |
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37 | |
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38 | /* |
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39 | * Symblolic IRQ names and related definitions. |
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40 | */ |
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41 | |
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42 | typedef enum { |
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43 | /* |
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44 | * Base vector for our USIU IRQ handlers. |
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45 | */ |
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46 | CPU_USIU_VECTOR_BASE = CPU_ASM_IRQ_VECTOR_BASE, |
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47 | /* |
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48 | * USIU IRQ handler related definitions |
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49 | */ |
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50 | CPU_USIU_IRQ_COUNT = 16, /* 16 reserved but in the future... */ |
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51 | CPU_USIU_IRQ_MIN_OFFSET = 0, |
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52 | CPU_USIU_IRQ_MAX_OFFSET = CPU_USIU_IRQ_MIN_OFFSET + CPU_USIU_IRQ_COUNT - 1, |
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53 | /* |
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54 | * UIMB IRQ handlers related definitions |
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55 | */ |
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56 | CPU_UIMB_IRQ_COUNT = 32 - 8, /* first 8 overlap USIU */ |
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57 | CPU_UIMB_IRQ_MIN_OFFSET = CPU_USIU_IRQ_COUNT + CPU_USIU_VECTOR_BASE, |
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58 | CPU_UIMB_IRQ_MAX_OFFSET = CPU_UIMB_IRQ_MIN_OFFSET + CPU_UIMB_IRQ_COUNT - 1, |
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59 | /* |
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60 | * PowerPc exceptions handled as interrupt where a rtems managed interrupt |
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61 | * handler might be connected |
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62 | */ |
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63 | CPU_PROC_IRQ_COUNT = 1, |
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64 | CPU_PROC_IRQ_MIN_OFFSET = CPU_UIMB_IRQ_MAX_OFFSET + 1, |
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65 | CPU_PROC_IRQ_MAX_OFFSET = CPU_PROC_IRQ_MIN_OFFSET + CPU_PROC_IRQ_COUNT - 1, |
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66 | /* |
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67 | * Summary |
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68 | */ |
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69 | CPU_IRQ_COUNT = CPU_PROC_IRQ_MAX_OFFSET + 1, |
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70 | CPU_MIN_OFFSET = CPU_USIU_IRQ_MIN_OFFSET, |
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71 | CPU_MAX_OFFSET = CPU_PROC_IRQ_MAX_OFFSET, |
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72 | /* |
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73 | * USIU IRQ symbolic name definitions. |
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74 | */ |
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75 | CPU_USIU_EXT_IRQ_0 = CPU_USIU_IRQ_MIN_OFFSET, |
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76 | CPU_USIU_INT_IRQ_0, |
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77 | |
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78 | CPU_USIU_EXT_IRQ_1, |
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79 | CPU_USIU_INT_IRQ_1, |
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80 | |
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81 | CPU_USIU_EXT_IRQ_2, |
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82 | CPU_USIU_INT_IRQ_2, |
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83 | |
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84 | CPU_USIU_EXT_IRQ_3, |
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85 | CPU_USIU_INT_IRQ_3, |
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86 | |
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87 | CPU_USIU_EXT_IRQ_4, |
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88 | CPU_USIU_INT_IRQ_4, |
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89 | |
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90 | CPU_USIU_EXT_IRQ_5, |
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91 | CPU_USIU_INT_IRQ_5, |
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92 | |
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93 | CPU_USIU_EXT_IRQ_6, |
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94 | CPU_USIU_INT_IRQ_6, |
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95 | |
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96 | CPU_USIU_EXT_IRQ_7, |
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97 | CPU_USIU_INT_IRQ_7, |
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98 | |
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99 | /* |
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100 | * Symbolic names for UISU interrupt sources. |
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101 | */ |
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102 | CPU_PERIODIC_TIMER = CPU_USIU_INT_IRQ_6, |
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103 | CPU_UIMB_INTERRUPT = CPU_USIU_INT_IRQ_7, |
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104 | |
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105 | /* |
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106 | * UIMB IRQ symbolic name definitions. The first 8 sources are aliases to |
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107 | * the USIU interrupts of the same number, because they are detected in |
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108 | * the USIU pending register rather than the UIMB pending register. |
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109 | */ |
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110 | CPU_UIMB_IRQ_0 = CPU_USIU_INT_IRQ_0, |
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111 | CPU_UIMB_IRQ_1 = CPU_USIU_INT_IRQ_1, |
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112 | CPU_UIMB_IRQ_2 = CPU_USIU_INT_IRQ_2, |
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113 | CPU_UIMB_IRQ_3 = CPU_USIU_INT_IRQ_3, |
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114 | CPU_UIMB_IRQ_4 = CPU_USIU_INT_IRQ_4, |
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115 | CPU_UIMB_IRQ_5 = CPU_USIU_INT_IRQ_5, |
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116 | CPU_UIMB_IRQ_6 = CPU_USIU_INT_IRQ_6, |
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117 | CPU_UIMB_IRQ_7 = CPU_USIU_INT_IRQ_7, |
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118 | |
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119 | CPU_UIMB_IRQ_8 = CPU_UIMB_IRQ_MIN_OFFSET, |
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120 | CPU_UIMB_IRQ_9, |
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121 | CPU_UIMB_IRQ_10, |
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122 | CPU_UIMB_IRQ_11, |
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123 | CPU_UIMB_IRQ_12, |
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124 | CPU_UIMB_IRQ_13, |
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125 | CPU_UIMB_IRQ_14, |
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126 | CPU_UIMB_IRQ_15, |
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127 | CPU_UIMB_IRQ_16, |
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128 | CPU_UIMB_IRQ_17, |
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129 | CPU_UIMB_IRQ_18, |
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130 | CPU_UIMB_IRQ_19, |
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131 | CPU_UIMB_IRQ_20, |
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132 | CPU_UIMB_IRQ_21, |
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133 | CPU_UIMB_IRQ_22, |
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134 | CPU_UIMB_IRQ_23, |
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135 | CPU_UIMB_IRQ_24, |
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136 | CPU_UIMB_IRQ_25, |
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137 | CPU_UIMB_IRQ_26, |
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138 | CPU_UIMB_IRQ_27, |
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139 | CPU_UIMB_IRQ_28, |
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140 | CPU_UIMB_IRQ_29, |
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141 | CPU_UIMB_IRQ_30, |
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142 | CPU_UIMB_IRQ_31, |
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143 | |
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144 | /* |
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145 | * Symbolic names for UIMB interrupt sources. |
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146 | */ |
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147 | CPU_IRQ_SCI = CPU_UIMB_IRQ_5, |
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148 | |
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149 | /* |
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150 | * Processor exceptions handled as rtems IRQ symbolic name definitions. |
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151 | */ |
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152 | CPU_DECREMENTER = CPU_PROC_IRQ_MIN_OFFSET |
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153 | |
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154 | }rtems_irq_symbolic_name; |
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155 | |
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156 | /* |
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157 | * Convert an rtems_irq_symbolic_name constant to an interrupt level |
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158 | * suitable for programming into an I/O device's interrupt level field. |
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159 | */ |
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160 | int CPU_irq_level_from_symbolic_name(const rtems_irq_symbolic_name name); |
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161 | |
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162 | /* |
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163 | * Type definition for RTEMS managed interrupts |
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164 | */ |
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165 | typedef unsigned char rtems_irq_prio; |
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166 | struct __rtems_irq_connect_data__; /* forward declaratiuon */ |
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167 | |
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168 | typedef void (*rtems_irq_hdl) (void); |
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169 | typedef void (*rtems_irq_enable) (const struct __rtems_irq_connect_data__*); |
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170 | typedef void (*rtems_irq_disable) (const struct __rtems_irq_connect_data__*); |
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171 | typedef int (*rtems_irq_is_enabled) (const struct __rtems_irq_connect_data__*); |
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172 | |
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173 | typedef struct __rtems_irq_connect_data__ { |
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174 | /* |
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175 | * IRQ line |
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176 | */ |
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177 | rtems_irq_symbolic_name name; |
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178 | /* |
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179 | * Handler. See comment on handler properties below in function prototype. |
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180 | */ |
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181 | rtems_irq_hdl hdl; |
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182 | /* |
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183 | * Function for enabling interrupts at device level (ONLY!). |
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184 | * The CPU code will automatically enable it at USIU level and UIMB level. |
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185 | * RATIONALE : anyway such code has to exist in current driver code. |
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186 | * It is usually called immediately AFTER connecting the interrupt handler. |
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187 | * RTEMS may well need such a function when restoring normal interrupt |
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188 | * processing after a debug session. |
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189 | * |
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190 | */ |
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191 | rtems_irq_enable on; |
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192 | /* |
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193 | * Function for disabling interrupts at device level (ONLY!). |
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194 | * The code will disable it at USIU and UIMB level. RATIONALE : anyway |
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195 | * such code has to exist for clean shutdown. It is usually called |
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196 | * BEFORE disconnecting the interrupt. RTEMS may well need such |
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197 | * a function when disabling normal interrupt processing for |
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198 | * a debug session. May well be a NOP function. |
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199 | */ |
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200 | rtems_irq_disable off; |
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201 | /* |
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202 | * Function enabling to know what interrupt may currently occur |
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203 | * if someone manipulates the USIU and UIMB interrupt mask without care... |
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204 | */ |
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205 | rtems_irq_is_enabled isOn; |
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206 | }rtems_irq_connect_data; |
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207 | |
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208 | typedef struct { |
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209 | /* |
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210 | * size of all the table fields (*Tbl) described below. |
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211 | */ |
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212 | unsigned int irqNb; |
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213 | /* |
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214 | * Default handler used when disconnecting interrupts. |
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215 | */ |
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216 | rtems_irq_connect_data defaultEntry; |
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217 | /* |
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218 | * Table containing initials/current value. |
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219 | */ |
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220 | rtems_irq_connect_data* irqHdlTbl; |
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221 | /* |
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222 | * actual value of CPU_USIU_IRQ_VECTOR_BASE... |
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223 | */ |
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224 | rtems_irq_symbolic_name irqBase; |
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225 | /* |
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226 | * software priorities associated with interrupts. |
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227 | * if irqPrio [i] > intrPrio [j] it means that |
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228 | * interrupt handler hdl connected for interrupt name i |
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229 | * will not be interrupted by the handler connected for interrupt j |
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230 | * The interrupt source will be physically masked at USIU and UIMB level. |
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231 | */ |
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232 | rtems_irq_prio* irqPrioTbl; |
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233 | }rtems_irq_global_settings; |
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234 | |
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235 | |
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236 | /*-------------------------------------------------------------------------+ |
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237 | | Function Prototypes. |
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238 | +--------------------------------------------------------------------------*/ |
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239 | |
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240 | #if 0 |
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241 | /* |
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242 | * -------------------- MPC5xx USIU Management Routines ----------------- |
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243 | */ |
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244 | /* |
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245 | * Function to disable a particular irq at USIU level. After calling |
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246 | * this function, even if the device asserts the interrupt line it will |
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247 | * not be propagated further to the processor |
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248 | */ |
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249 | int CPU_irq_disable_at_usiu (const rtems_irq_symbolic_name irqLine); |
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250 | /* |
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251 | * Function to enable a particular irq at USIU level. After calling |
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252 | * this function, if the device asserts the interrupt line it will |
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253 | * be propagated further to the processor |
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254 | */ |
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255 | int CPU_irq_enable_at_usiu (const rtems_irq_symbolic_name irqLine); |
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256 | /* |
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257 | * Function to acknowledge a particular irq at USIU level. After calling |
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258 | * this function, if a device asserts an enabled interrupt line it will |
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259 | * be propagated further to the processor. Mainly useful for people |
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260 | * writing raw handlers as this is automagically done for rtems managed |
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261 | * handlers. |
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262 | */ |
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263 | int CPU_irq_ack_at_siu (const rtems_irq_symbolic_name irqLine); |
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264 | /* |
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265 | * function to check if a particular irq is enabled at USIU level. |
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266 | */ |
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267 | int CPU_irq_enabled_at_siu (const rtems_irq_symbolic_name irqLine); |
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268 | |
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269 | #endif |
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270 | |
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271 | /* |
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272 | * ------------ RTEMS Single Irq Handler Management Routines ---------------- |
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273 | */ |
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274 | /* |
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275 | * Function to connect a particular irq handler. This handler will NOT be |
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276 | * called directly as the result of the corresponding interrupt. Instead, a |
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277 | * RTEMS irq prologue will be called that will : |
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278 | * |
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279 | * 1) save the C scratch registers, |
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280 | * 2) switch to a interrupt stack if the interrupt is not nested, |
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281 | * 4) modify them to disable the current interrupt at USIU level (and |
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282 | * maybe others depending on software priorities) |
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283 | * 5) aknowledge the USIU', |
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284 | * 6) demask the processor, |
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285 | * 7) call the application handler |
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286 | * |
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287 | * As a result the hdl function provided |
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288 | * |
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289 | * a) can perfectly be written is C, |
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290 | * b) may also well directly call the part of the RTEMS API that can be |
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291 | * used from interrupt level, |
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292 | * c) It only responsible for handling the jobs that need to be done at |
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293 | * the device level including (aknowledging/re-enabling the |
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294 | * interrupt at device, level, getting the data,...) |
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295 | * |
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296 | * When returning from the function, the following will be performed by |
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297 | * the RTEMS irq epilogue : |
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298 | * |
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299 | * 1) masks the interrupts again, |
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300 | * 2) restore the original USIU interrupt masks |
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301 | * 3) switch back on the orinal stack if needed, |
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302 | * 4) perform rescheduling when necessary, |
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303 | * 5) restore the C scratch registers... |
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304 | * 6) restore initial execution flow |
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305 | * |
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306 | */ |
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307 | int CPU_install_rtems_irq_handler (const rtems_irq_connect_data*); |
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308 | /* |
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309 | * Function to connect an RTEMS irq handler for ptr->name. |
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310 | */ |
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311 | int CPU_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr); |
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312 | /* |
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313 | * Function to get the RTEMS irq handler for ptr->name. |
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314 | */ |
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315 | int CPU_remove_rtems_irq_handler (const rtems_irq_connect_data*); |
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316 | /* |
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317 | * Function to disconnect the RTEMS irq handler for ptr->name. This |
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318 | * function checks that the value given is the current one for safety |
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319 | * reason. The user can use the previous function to get it. |
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320 | */ |
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321 | |
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322 | /* |
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323 | * ------------ RTEMS Global Irq Handler Management Routines ---------------- |
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324 | */ |
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325 | /* |
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326 | * (Re) Initialize the RTEMS interrupt management. |
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327 | * |
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328 | * The result of calling this function will be the same as if each |
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329 | * individual handler (config->irqHdlTbl[i].hdl) different from |
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330 | * "config->defaultEntry.hdl" has been individualy connected via |
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331 | * |
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332 | * CPU_install_rtems_irq_handler(&config->irqHdlTbl[i]) |
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333 | * |
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334 | * and each handler currently equal to config->defaultEntry.hdl |
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335 | * has been previously disconnected via |
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336 | * |
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337 | * CPU_remove_rtems_irq_handler (&config->irqHdlTbl[i]) |
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338 | * |
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339 | * This is to say that all information given will be used and not just |
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340 | * only the space. |
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341 | * |
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342 | * CAUTION : the various table address contained in config will be used |
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343 | * directly by the interrupt mangement code in order to save |
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344 | * data size so they must stay valid after the call => they should |
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345 | * not be modified or declared on a stack. |
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346 | */ |
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347 | |
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348 | int CPU_rtems_irq_mngt_set(rtems_irq_global_settings* config); |
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349 | /* |
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350 | * (Re) get info on current RTEMS interrupt management. |
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351 | */ |
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352 | int CPU_rtems_irq_mngt_get(rtems_irq_global_settings**); |
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353 | |
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354 | extern void CPU_rtems_irq_mng_init(unsigned cpuId); |
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355 | |
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356 | #endif |
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357 | |
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358 | #endif |
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