source: rtems/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S @ 29313369

4.104.115
Last change on this file since 29313369 was 29313369, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on 04/07/10 at 06:45:59

changes to support GW_LCFM

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup mpc55xx_asm
5 *
6 * @brief Memory copy and zero functions.
7 */
8
9/*
10 * Copyright (c) 2008
11 * Embedded Brains GmbH
12 * Obere Lagerstr. 30
13 * D-82178 Puchheim
14 * Germany
15 * rtems@embedded-brains.de
16 *
17 * The license and distribution terms for this file may be found in the file
18 * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
19 */
20
21#include <libcpu/powerpc-utility.h>
22#include <bspopts.h>
23
24.section ".text"
25
26/**
27 * @fn int mpc55xx_copy_8( const void *src, void *dest, size_t n)
28 *
29 * @brief Copy @a n bytes from @a src to @a dest with 8 byte reads and writes.
30 *
31 * The memory areas should not overlap.  The addresses @a src and @a dest have
32 * to be aligned on 8 byte boundaries.  The size @a n must be evenly divisible by 8.
33 * The SPE operations @b evxor, @b evlddx and @b evstddx will be used.
34 */
35#if       ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
36GLOBAL_FUNCTION mpc55xx_copy_8
37#endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
38GLOBAL_FUNCTION mpc55xx_copy_4
39        /* Loop counter = data size / 4 */
40        srwi. r5, r5, 2
41        beqlr
42        mtctr r5
43        xor   r5,r5,r5
44copy_data4:
45        lwzx  r6, r5, r3
46        stwx  r6, r5, r4
47        addi r5, r5, 4
48        bdnz copy_data4
49
50        /* Return */
51        blr
52
53#if  !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
54/**
55 * @fn int mpc55xx_copy_8( const void *src, void *dest, size_t n)
56 *
57 * @brief Copy @a n bytes from @a src to @a dest with 8 byte reads and writes.
58 *
59 * The memory areas should not overlap.  The addresses @a src and @a dest have
60 * to be aligned on 8 byte boundaries.  The size @a n must be evenly divisible by 8.
61 * The SPE operations @b evxor, @b evlddx and @b evstddx will be used.
62 */
63GLOBAL_FUNCTION mpc55xx_copy_8
64        /* Loop counter = data size / 8 */
65        srwi. r5, r5, 3
66        beqlr
67        mtctr r5
68
69        /* Set offset */
70        evxor r5, r5, r5
71
72copy_data:
73        evlddx r6, r3, r5
74        evstddx r6, r4, r5
75        addi r5, r5, 8
76        bdnz copy_data
77
78        /* Return */
79        blr
80#endif /*!((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))*/
81
82/**
83 * @fn int mpc55xx_zero_4( void *dest, size_t n)
84 *
85 * @brief Zero all @a n bytes starting at @a dest with 4 byte writes.
86 *
87 * The address @a dest has to be aligned on 4 byte boundaries.  The size @a n
88 * must be evenly divisible by 4.  No SPE operations are used.
89 */
90#if       ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
91GLOBAL_FUNCTION mpc55xx_zero_32
92GLOBAL_FUNCTION mpc55xx_zero_8
93#endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
94GLOBAL_FUNCTION mpc55xx_zero_4
95        /* Create zero */
96        xor r0, r0, r0
97
98        /* Loop counter for the first bytes up to 16 bytes */
99        rlwinm. r9, r4, 29, 30, 31
100        beq zero_more4
101        mtctr r9
102        xor   r5,r5,r5
103
104zero_data4:
105        stwx r0, r5, r3
106        addi r5, r5, 4
107        bdnz zero_data4
108
109zero_more4:
110        /* More than 16 bytes? */
111        srwi. r9, r4, 4
112        beqlr
113        mtctr r9
114
115zero_big_data4:
116        stw r0,  0(r3)
117        stw r0,  4(r3)
118        stw r0,  8(r3)
119        stw r0, 12(r3)
120        addi r3, r3, 16
121        bdnz zero_big_data4
122        /* Return */
123        blr
124#if      !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
125/**
126 * @fn int mpc55xx_zero_8( void *dest, size_t n)
127 *
128 * @brief Zero all @a n bytes starting at @a dest with 8 byte writes.
129 *
130 * The address @a dest has to be aligned on 8 byte boundaries.  The size @a n
131 * must be evenly divisible by 8.  The SPE operations @b evxor and @b evstddx will be used.
132 */
133GLOBAL_FUNCTION mpc55xx_zero_8
134        /* Create zero */
135        evxor r0, r0, r0
136
137        /* Set offset */
138        evxor r5, r5, r5
139
140        /* Loop counter for the first bytes up to 32 bytes */
141        rlwinm. r9, r4, 29, 30, 31
142        beq zero_more
143        mtctr r9
144
145zero_data:
146        evstddx r0, r3, r5
147        addi r5, r5, 8
148        bdnz zero_data
149
150zero_more:
151        /* More than 32 bytes? */
152        srwi. r9, r4, 5
153        beqlr
154        mtctr r9
155
156        /* Set offsets */
157        addi r6, r5, 8
158        addi r7, r5, 16
159        addi r8, r5, 24
160
161zero_big_data:
162        evstddx r0, r3, r5
163        addi r5, r5, 32
164        evstddx r0, r3, r6
165        addi r6, r6, 32
166        evstddx r0, r3, r7
167        addi r7, r7, 32
168        evstddx r0, r3, r8
169        addi r8, r8, 32
170        bdnz zero_big_data
171        /* Return */
172        blr
173
174/**
175 * @fn int mpc55xx_zero_32( void *dest, size_t n)
176 *
177 * @brief Zero all @a n bytes starting at @a dest with 32 byte writes.
178 *
179 * The address @a dest has to be aligned on 32 byte boundaries.  The size @a n
180 * must be evenly divisible by 32.  The function operates with the cache block zero
181 * operation @b dcbz.
182 *
183 * @note The cache has to be enabled for the desired memory area.
184 */
185GLOBAL_FUNCTION mpc55xx_zero_32
186        /* Set offset */
187        xor r5, r5, r5
188
189        /* Loop counter for the first bytes up to 128 bytes */
190        rlwinm. r9, r4, 27, 28, 31
191        beq zero_more_lines
192        mtctr r9
193
194zero_line:
195        dcbz r3, r5
196        addi r5, r5, 32
197        bdnz zero_line
198
199zero_more_lines:
200        /* More than 128 bytes? */
201        srwi. r9, r4, 7
202        beqlr
203        mtctr r9
204
205        /* Set offsets */
206        addi r6, r5, 32
207        addi r7, r5, 64
208        addi r8, r5, 96
209
210zero_big_line:
211        dcbz r3, r5
212        addi r5, r5, 128
213        dcbz r3, r6
214        addi r6, r6, 128
215        dcbz r3, r7
216        addi r7, r7, 128
217        dcbz r3, r8
218        addi r8, r8, 128
219        bdnz zero_big_line
220
221        /* Return */
222        blr
223#endif  /*  !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
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