1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup mpc55xx_asm |
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5 | * |
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6 | * @brief Memory copy and zero functions. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2008 |
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11 | * Embedded Brains GmbH |
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12 | * Obere Lagerstr. 30 |
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13 | * D-82178 Puchheim |
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14 | * Germany |
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15 | * rtems@embedded-brains.de |
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16 | * |
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17 | * The license and distribution terms for this file may be found in the file |
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18 | * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE. |
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19 | */ |
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20 | |
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21 | #include <libcpu/powerpc-utility.h> |
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22 | #include <bspopts.h> |
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23 | |
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24 | .section ".text" |
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25 | |
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26 | /** |
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27 | * @fn int mpc55xx_copy_8( const void *src, void *dest, size_t n) |
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28 | * |
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29 | * @brief Copy @a n bytes from @a src to @a dest with 8 byte reads and writes. |
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30 | * |
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31 | * The memory areas should not overlap. The addresses @a src and @a dest have |
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32 | * to be aligned on 8 byte boundaries. The size @a n must be evenly divisible by 8. |
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33 | * The SPE operations @b evxor, @b evlddx and @b evstddx will be used. |
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34 | */ |
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35 | #if ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) |
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36 | GLOBAL_FUNCTION mpc55xx_copy_8 |
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37 | #endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */ |
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38 | GLOBAL_FUNCTION mpc55xx_copy_4 |
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39 | /* Loop counter = data size / 4 */ |
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40 | srwi. r5, r5, 2 |
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41 | beqlr |
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42 | mtctr r5 |
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43 | xor r5,r5,r5 |
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44 | copy_data4: |
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45 | lwzx r6, r5, r3 |
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46 | stwx r6, r5, r4 |
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47 | addi r5, r5, 4 |
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48 | bdnz copy_data4 |
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49 | |
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50 | /* Return */ |
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51 | blr |
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52 | |
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53 | #if !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) |
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54 | /** |
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55 | * @fn int mpc55xx_copy_8( const void *src, void *dest, size_t n) |
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56 | * |
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57 | * @brief Copy @a n bytes from @a src to @a dest with 8 byte reads and writes. |
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58 | * |
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59 | * The memory areas should not overlap. The addresses @a src and @a dest have |
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60 | * to be aligned on 8 byte boundaries. The size @a n must be evenly divisible by 8. |
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61 | * The SPE operations @b evxor, @b evlddx and @b evstddx will be used. |
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62 | */ |
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63 | GLOBAL_FUNCTION mpc55xx_copy_8 |
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64 | /* Loop counter = data size / 8 */ |
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65 | srwi. r5, r5, 3 |
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66 | beqlr |
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67 | mtctr r5 |
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68 | |
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69 | /* Set offset */ |
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70 | evxor r5, r5, r5 |
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71 | |
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72 | copy_data: |
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73 | evlddx r6, r3, r5 |
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74 | evstddx r6, r4, r5 |
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75 | addi r5, r5, 8 |
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76 | bdnz copy_data |
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77 | |
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78 | /* Return */ |
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79 | blr |
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80 | #endif /*!((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))*/ |
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81 | |
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82 | /** |
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83 | * @fn int mpc55xx_zero_4( void *dest, size_t n) |
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84 | * |
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85 | * @brief Zero all @a n bytes starting at @a dest with 4 byte writes. |
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86 | * |
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87 | * The address @a dest has to be aligned on 4 byte boundaries. The size @a n |
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88 | * must be evenly divisible by 4. No SPE operations are used. |
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89 | */ |
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90 | #if ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) |
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91 | GLOBAL_FUNCTION mpc55xx_zero_32 |
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92 | GLOBAL_FUNCTION mpc55xx_zero_8 |
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93 | #endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */ |
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94 | GLOBAL_FUNCTION mpc55xx_zero_4 |
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95 | /* Create zero */ |
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96 | xor r0, r0, r0 |
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97 | |
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98 | /* Loop counter for the first bytes up to 16 bytes */ |
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99 | rlwinm. r9, r4, 29, 30, 31 |
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100 | beq zero_more4 |
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101 | mtctr r9 |
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102 | xor r5,r5,r5 |
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103 | |
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104 | zero_data4: |
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105 | stwx r0, r5, r3 |
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106 | addi r5, r5, 4 |
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107 | bdnz zero_data4 |
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108 | |
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109 | zero_more4: |
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110 | /* More than 16 bytes? */ |
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111 | srwi. r9, r4, 4 |
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112 | beqlr |
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113 | mtctr r9 |
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114 | |
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115 | zero_big_data4: |
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116 | stw r0, 0(r3) |
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117 | stw r0, 4(r3) |
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118 | stw r0, 8(r3) |
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119 | stw r0, 12(r3) |
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120 | addi r3, r3, 16 |
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121 | bdnz zero_big_data4 |
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122 | /* Return */ |
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123 | blr |
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124 | #if !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) |
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125 | /** |
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126 | * @fn int mpc55xx_zero_8( void *dest, size_t n) |
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127 | * |
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128 | * @brief Zero all @a n bytes starting at @a dest with 8 byte writes. |
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129 | * |
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130 | * The address @a dest has to be aligned on 8 byte boundaries. The size @a n |
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131 | * must be evenly divisible by 8. The SPE operations @b evxor and @b evstddx will be used. |
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132 | */ |
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133 | GLOBAL_FUNCTION mpc55xx_zero_8 |
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134 | /* Create zero */ |
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135 | evxor r0, r0, r0 |
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136 | |
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137 | /* Set offset */ |
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138 | evxor r5, r5, r5 |
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139 | |
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140 | /* Loop counter for the first bytes up to 32 bytes */ |
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141 | rlwinm. r9, r4, 29, 30, 31 |
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142 | beq zero_more |
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143 | mtctr r9 |
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144 | |
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145 | zero_data: |
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146 | evstddx r0, r3, r5 |
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147 | addi r5, r5, 8 |
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148 | bdnz zero_data |
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149 | |
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150 | zero_more: |
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151 | /* More than 32 bytes? */ |
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152 | srwi. r9, r4, 5 |
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153 | beqlr |
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154 | mtctr r9 |
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155 | |
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156 | /* Set offsets */ |
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157 | addi r6, r5, 8 |
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158 | addi r7, r5, 16 |
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159 | addi r8, r5, 24 |
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160 | |
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161 | zero_big_data: |
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162 | evstddx r0, r3, r5 |
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163 | addi r5, r5, 32 |
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164 | evstddx r0, r3, r6 |
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165 | addi r6, r6, 32 |
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166 | evstddx r0, r3, r7 |
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167 | addi r7, r7, 32 |
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168 | evstddx r0, r3, r8 |
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169 | addi r8, r8, 32 |
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170 | bdnz zero_big_data |
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171 | /* Return */ |
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172 | blr |
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173 | |
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174 | /** |
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175 | * @fn int mpc55xx_zero_32( void *dest, size_t n) |
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176 | * |
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177 | * @brief Zero all @a n bytes starting at @a dest with 32 byte writes. |
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178 | * |
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179 | * The address @a dest has to be aligned on 32 byte boundaries. The size @a n |
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180 | * must be evenly divisible by 32. The function operates with the cache block zero |
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181 | * operation @b dcbz. |
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182 | * |
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183 | * @note The cache has to be enabled for the desired memory area. |
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184 | */ |
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185 | GLOBAL_FUNCTION mpc55xx_zero_32 |
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186 | /* Set offset */ |
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187 | xor r5, r5, r5 |
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188 | |
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189 | /* Loop counter for the first bytes up to 128 bytes */ |
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190 | rlwinm. r9, r4, 27, 28, 31 |
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191 | beq zero_more_lines |
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192 | mtctr r9 |
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193 | |
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194 | zero_line: |
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195 | dcbz r3, r5 |
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196 | addi r5, r5, 32 |
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197 | bdnz zero_line |
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198 | |
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199 | zero_more_lines: |
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200 | /* More than 128 bytes? */ |
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201 | srwi. r9, r4, 7 |
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202 | beqlr |
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203 | mtctr r9 |
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204 | |
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205 | /* Set offsets */ |
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206 | addi r6, r5, 32 |
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207 | addi r7, r5, 64 |
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208 | addi r8, r5, 96 |
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209 | |
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210 | zero_big_line: |
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211 | dcbz r3, r5 |
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212 | addi r5, r5, 128 |
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213 | dcbz r3, r6 |
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214 | addi r6, r6, 128 |
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215 | dcbz r3, r7 |
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216 | addi r7, r7, 128 |
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217 | dcbz r3, r8 |
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218 | addi r8, r8, 128 |
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219 | bdnz zero_big_line |
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220 | |
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221 | /* Return */ |
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222 | blr |
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223 | #endif /* !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */ |
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