source: rtems/c/src/lib/libcpu/powerpc/e500/mmu/e500_mmu.h @ 76d8cd0

4.104.114.95
Last change on this file since 76d8cd0 was 76d8cd0, checked in by Till Straumann <strauman@…>, on 02/09/08 at 00:46:08

2008-02-08 Till Straumann <strauman@…>

  • Makefile.am, e500/, e500/mmu, e500/mmu/mmu.c, e500/mmu/e500_mmu.h: added code for PPC E500 TLB manipulation.
  • Property mode set to 100644
File size: 7.3 KB
Line 
1#ifndef RTEMS_E500_MMU_DRIVER_H
2#define RTEMS_E500_MMU_DRIVER_H
3/* $Id$ */
4
5/*
6 * Routines to manipulate e500 TLBs; TLB0 (fixed 4k page size)
7 * is not very useful so we mostly focus on TLB1 (variable page size)
8 */
9
10/*
11 * Authorship
12 * ----------
13 * This software was created by
14 *     Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
15 *         Stanford Linear Accelerator Center, Stanford University.
16 *
17 * Acknowledgement of sponsorship
18 * ------------------------------
19 * This software was produced by
20 *     the Stanford Linear Accelerator Center, Stanford University,
21 *         under Contract DE-AC03-76SFO0515 with the Department of Energy.
22 *
23 * Government disclaimer of liability
24 * ----------------------------------
25 * Neither the United States nor the United States Department of Energy,
26 * nor any of their employees, makes any warranty, express or implied, or
27 * assumes any legal liability or responsibility for the accuracy,
28 * completeness, or usefulness of any data, apparatus, product, or process
29 * disclosed, or represents that its use would not infringe privately owned
30 * rights.
31 *
32 * Stanford disclaimer of liability
33 * --------------------------------
34 * Stanford University makes no representations or warranties, express or
35 * implied, nor assumes any liability for the use of this software.
36 *
37 * Stanford disclaimer of copyright
38 * --------------------------------
39 * Stanford University, owner of the copyright, hereby disclaims its
40 * copyright and all other rights in this software.  Hence, anyone may
41 * freely use it for any purpose without restriction. 
42 *
43 * Maintenance of notices
44 * ----------------------
45 * In the interest of clarity regarding the origin and status of this
46 * SLAC software, this and all the preceding Stanford University notices
47 * are to remain affixed to any copy or derivative of this software made
48 * or distributed by the recipient and are to be affixed to any copy of
49 * software made or distributed by the recipient that contains a copy or
50 * derivative of this software.
51 *
52 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
53 */
54
55#include <rtems.h>
56#include <inttypes.h>
57#include <stdio.h>
58
59#ifdef __cplusplus
60extern "C" {
61#endif
62
63/* Some routines require or return a index 'key'. This
64 * is simply the TLB entry # ORed with E500_SELTLB_0
65 * or E500_SELTLB_1 specifying an entry in TLB0 or TLB1,
66 * respectively.
67 */
68typedef int rtems_e500_tlb_idx;
69#define E500_SELTLB_0   0x0000
70#define E500_SELTLB_1   0x1000
71
72/* Cache the relevant TLB1 entries so that we can
73 * make sure the user cannot create conflicting
74 * (overlapping) entries.
75 * Keep them public for informational purposes.
76 */
77typedef struct {
78        struct {
79                uint32_t va_epn: 20;
80                uint32_t va_tid: 12;
81        }         va;
82        uint32_t rpn;
83        struct {
84                uint32_t     sz:  4;
85                uint32_t     ts:  1;
86                uint32_t      v:  1;
87                uint32_t   perm: 10;
88                uint32_t  wimge:  7;
89        }        att;
90} E500_tlb_va_cache_t;
91
92extern E500_tlb_va_cache_t rtems_e500_tlb_va_cache[16];
93
94/*
95 * Dump (cleartext) content info from cached TLB entries
96 * to a file (stdout if f==NULL).
97 */
98void
99rtems_e500_dmptlbc(FILE *f);
100
101/*
102 * Read a TLB entry from the hardware; if it is a TLB1 entry
103 * then the current settings are stored in the
104 * rtems_e500_tlb_va_cache[] structure.
105 *
106 * The routine can perform this operation quietly or
107 * print information to a file.
108 *
109 *   'key': TLB entry index ORed with selector bit
110 *          (E500_SELTLB_0 for TLB0, E500_SELTLB_1 for TLB1).
111 * 'quiet': perform operation silently (no info printed)
112 *          if nonzero.
113 *     'f': open FILE where to print information. May be
114 *          NULL in which case 'stdout' is used.
115 *
116 * RETURNS:
117 *       0: success; TLB entry is VALID
118 *      +1: success but TLB entry is INVALID
119 *     < 0: error (-1: invalid argument)
120 */
121int
122rtems_e500_prtlb(rtems_e500_tlb_idx key, int quiet, FILE *f);
123
124/* Initialize cache; verify that TLB0 is unused;
125 *
126 * RETURNS: zero on success, nonzero on error (TLB0
127 *          seems to be in use); in this case the
128 *          driver will refuse to change TLB1 entries
129 *          (other than disabling them).
130 */
131int
132rtems_e500_initlb();
133
134/*
135 * Write TLB1 entry (can also be used to disable an entry).
136 *
137 * The routine checks against the cached data in
138 * rtems_e500_tlb_va[] to prevent the user from generating
139 * overlapping entries.
140 *
141 *   'idx': TLB 1 entry # to manipulate
142 *    'ea': Effective address (must be page aligned)
143 *    'pa': Physical  address (must be page aligned)
144 *    'sz': Page size selector; page size is
145 *          1024 * 2^(2*sz) bytes.
146 *          'sz' may also be one of the following:
147 *          - page size in bytes ( >= 1024 ); the selector
148 *            value is then computed by this routine.
149 *            However, 'sz' must be a valid page size
150 *            or -1 will be returned.
151 *          - a value < 0 to invalidate/disable the
152 *            TLB entry.
153 *  'attr': Page attributes; ORed combination of WIMGE,
154 *          PERMissions, TID and TS. Use ATTR_xxx macros
155 *
156 * RETURNS: 0 on success, nonzero on error:
157 *
158 *         >0: requested mapping would overlap with
159 *             existing mapping in other entry. Return
160 *             value gives conflicting entry + 1; i.e.,
161 *             if a value of 4 is returned then the request
162 *             conflicts with existing mapping in entry 3.
163 *         -1: invalid argument
164 *         -3: driver not initialized (or initialization
165 *             failed because TLB0 is in use).
166 *         <0: other error
167 *
168 */
169#define E500_TLB_ATTR_WIMGE(x)      ((x)&0x7f)                          /* includes user bits */
170#define E500_TLB_ATTR_WIMGE_GET(x)  ((x)&0x7f)
171#define E500_TLB_ATTR_TS            (1<<7)
172#define E500_TLB_ATTR_PERM(x)           (((x)&0x3ff)<<8)
173#define E500_TLB_ATTR_PERM_GET(x)   (((x)>>8)&0x3ff)
174#define E500_TLB_ATTR_TID(x)        (((x)&0xfff)<<20)
175#define E500_TLB_ATTR_TID_GET(x)    (((x)>>20)&0xfff)
176
177int
178rtems_e500_wrtlb(int idx, uint32_t ea, uint32_t pa, int sz, uint32_t attr);
179
180/*
181 * Check if a ts/tid/ea/sz mapping overlaps
182 * with an existing entry.
183 *
184 * ASSUMPTION: all TLB0 (fixed 4k pages) are invalid and always unused.
185 *
186 * NOTE: 'sz' is the 'logarithmic' size selector; the page size
187 *       is 1024*2^(2*sz).
188 *
189 * RETURNS:
190 *     >= 0: index of TLB1 entry that already provides a mapping
191 *           which overlaps within the ea range.
192 *       -1: SUCCESS (no conflicting entry found)
193 *     <=-2: ERROR (invalid input)
194 */
195int
196rtems_e500_matchtlb(uint32_t ea, uint32_t tid, int ts, int sz);
197
198/* Find TLB index that maps 'ea/as' combination
199 *
200 * RETURNS: index 'key'; i.e., the index number plus
201 *          a bit (E500_SELTLB_1) which indicates whether
202 *          the mapping was found in TLB0 (4k fixed page
203 *          size) or in TLB1 (variable page size).
204 *
205 *          On error (no mapping) -1 is returned.
206 */
207rtems_e500_tlb_idx
208rtems_e500_ftlb(uint32_t ea, int as);
209
210/* Mark TLB entry as invalid ('disabled'). Unlike
211 * rtems_e500_wrtlb() with a negative size argument
212 * this routine also can disable TLB0 entries.
213 *
214 * 'key': TLB entry index ORed with selector bit
215 *        (E500_SELTLB_0 for TLB0, E500_SELTLB_1 for TLB1).
216 *
217 * RETURNS: zero on success, nonzero on error (TLB
218 *          unchanged).
219 *
220 * NOTE:  If a TLB1 entry is disabled the associated
221 *        entry in rtems_e500_va_cache[] is also
222 *        marked as disabled.
223 */
224int
225rtems_e500_clrtlb(rtems_e500_tlb_idx key);
226
227#ifdef __cplusplus
228};
229#endif
230
231#endif
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