source: rtems/c/src/lib/libcpu/mips/tx39/vectorisrs/vectorisrs.c @ 7d18fdc

4.104.114.84.95
Last change on this file since 7d18fdc was 7d18fdc, checked in by Joel Sherrill <joel.sherrill@…>, on 12/19/00 at 16:56:42

2000-12-19 Joel Sherrill <joel@…>

  • tx39/vectorisrs/vectorisrs.c: Modified to have default exception vector handler. This should be in a separate file so the BSP can easily override it.
  • Property mode set to 100644
File size: 1.1 KB
Line 
1/*
2 *  $Id$
3 */
4
5#include <rtems.h>
6#include <stdlib.h>
7#include <libcpu/tx3904.h>
8
9#define mips_get_cause( _cause ) \
10  do { \
11    asm volatile( "mfc0 %0, $13; nop" : "=g" (_cause) :  ); \
12  } while (0)
13
14#define CALL_ISR(_vector) \
15  do { \
16    if ( _ISR_Vector_table[_vector] ) \
17      (_ISR_Vector_table[_vector])(_vector); \
18    else \
19      mips_default_exception(_vector); \
20  } while (0)
21
22void mips_default_exception( int vector )
23{
24  printk( "Unhandled exception %d\n", vector );
25  rtems_fatal_error_occurred(1);
26}
27
28void mips_vector_isr_handlers( void )
29{
30  unsigned int sr;
31  unsigned int cause;
32
33  mips_get_sr( sr );
34  mips_get_cause( cause );
35
36  cause &= (sr & SR_IMASK);
37  cause >>= CAUSE_IPSHIFT;
38
39  if ( cause & 0x80 )       /* IP[5] ==> INT0 */
40    CALL_ISR( TX3904_IRQ_INT0 );
41
42  if ( cause & 0x40 ) {     /* (IP[4] == 1) ==> IP[0-3] are valid */
43    unsigned int v = (cause >> 2) & 0x0f;
44    CALL_ISR( v );
45  }
46   
47  if ( cause & 0x02 )       /* SW[0] */
48    CALL_ISR( TX3904_IRQ_SOFTWARE_1 );
49
50  if ( cause & 0x01 )       /* IP[1] */
51    CALL_ISR( TX3904_IRQ_SOFTWARE_2 );
52}
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