source: rtems/c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c @ bbc99f1a

4.104.114.84.95
Last change on this file since bbc99f1a was bbc99f1a, checked in by Joel Sherrill <joel.sherrill@…>, on May 7, 2001 at 1:10:53 PM

2001-05-07 Joel Sherrill <joel@…>

  • shared/interrupts/vectorexceptions.c: New file to decode exception code and vector appropriate NON-interrupt exception.
  • shared/interrupts/Makefile.am: Modified to reflect above.
  • Property mode set to 100644
File size: 2.2 KB
Line 
1/*
2 *  ISR Vectoring support for the Synova Mongoose-V.
3 *
4 *  COPYRIGHT (c) 1989-2001.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.OARcorp.com/rtems/license.html.
10 *
11 *  $Id$
12 */
13
14#include <rtems.h>
15#include <stdlib.h>
16
17#define mips_get_cause( _cause ) \
18  do { \
19    asm volatile( "mfc0 %0, $13; nop" : "=r" (_cause) :  ); \
20  } while (0)
21
22#define CALL_ISR(_vector) \
23  do { \
24    if ( _ISR_Vector_table[_vector] ) \
25      (_ISR_Vector_table[_vector])(_vector); \
26    else \
27      mips_default_exception_code_handler(_vector); \
28  } while (0)
29
30#include <bspIo.h>  /* for printk */
31
32char *cause_strings[32] = {
33  /*  0 */ "Int",
34  /*  1 */ "TLB Mods",
35  /*  2 */ "TLB Load",
36  /*  3 */ "TLB Store",
37  /*  4 */ "Address Load",
38  /*  5 */ "Address Store",
39  /*  6 */ "Instruction Bus Error",
40  /*  7 */ "Data Bus Error",
41  /*  9 */ "Syscall",
42  /* 10 */ "Breakpoint",
43  /* 11 */ "Reserved Instruction",
44  /* 12 */ "Coprocessor Unuseable",
45  /* 13 */ "Overflow",
46  /* 14 */ "Trap",
47  /* 15 */ "Instruction Virtual Coherency Error",
48  /* 16 */ "FP Exception",
49  /* 17 */ "Reserved 17",
50  /* 18 */ "Reserved 17",
51  /* 19 */ "Reserved 17",
52  /* 20 */ "Reserved 20",
53  /* 21 */ "Reserved 21",
54  /* 22 */ "Reserved 22",
55  /* 23 */ "Watch",
56  /* 24 */ "Reserved 24",
57  /* 25 */ "Reserved 25",
58  /* 26 */ "Reserved 26",
59  /* 27 */ "Reserved 27",
60  /* 28 */ "Reserved 28",
61  /* 29 */ "Reserved 29",
62  /* 30 */ "Reserved 30",
63  /* 31 */ "Data Virtual Coherency Error"
64};
65
66void mips_default_exception_code_handler( int exc, CPU_Interrupt_frame *frame )
67{
68  unsigned int sr;
69  unsigned int cause;
70
71  mips_get_cause( cause );
72
73  printk( "Unhandled exception cause %d\n", exc );
74  printk( "sr: 0x%08x", sr );
75  printk( "cause: 0x%08x --> %s", cause, cause_strings[(cause >> 2) &0x1f] );
76  /* XXX dump frame once defined */
77  rtems_fatal_error_occurred(1);
78}
79
80void mips_vector_exceptions( CPU_Interrupt_frame *frame )
81{
82  unsigned int cause;
83  int          exc;
84
85  mips_get_cause( cause );
86  exc = (cause >> 2) &0x1f;
87
88  printk( "Exception!\n" );
89  mips_default_exception_code_handler( exc, frame );
90}
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