source: rtems/c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c @ 35f97010

4.104.114.84.95
Last change on this file since 35f97010 was 35f97010, checked in by Ralf Corsepius <ralf.corsepius@…>, on Mar 31, 2004 at 2:02:23 AM

2004-03-30 Ralf Corsepius <ralf_corsepius@…>

  • clock/ckinit.c, clock/clock.h, mongoosev/duart/mg5uart.c, mongoosev/duart/mg5uart.h, mongoosev/duart/mg5uart_reg.c, mongoosev/include/mongoose-v.h, mongoosev/vectorisrs/vectorisrs.c, shared/interrupts/vectorexceptions.c, timer/timer.c, tx39/include/tx3904.h: Convert to using c99 fixed size types.
  • Property mode set to 100644
File size: 3.0 KB
Line 
1/*
2 *  Common Code for Vectoring MIPS Exceptions
3 *
4 *  The actual decoding of the cause register and vector number assignment
5 *  is CPU model specific.
6 *
7 *  $Id$
8 */
9
10#include <rtems.h>
11#include <stdlib.h>
12#include <string.h>
13#include "iregdef.h"
14#include "idtcpu.h"
15#include <rtems/bspIo.h>
16
17char *cause_strings[32] =
18{
19  /*  0 */ "Int",
20  /*  1 */ "TLB Mods",
21  /*  2 */ "TLB Load",
22  /*  3 */ "TLB Store",
23  /*  4 */ "Address Load",
24  /*  5 */ "Address Store",
25  /*  6 */ "Instruction Bus Error",
26  /*  7 */ "Data Bus Error",
27  /*  9 */ "Syscall",
28  /* 10 */ "Breakpoint",
29  /* 11 */ "Reserved Instruction",
30  /* 12 */ "Coprocessor Unuseable",
31  /* 13 */ "Overflow",
32  /* 14 */ "Trap",
33  /* 15 */ "Instruction Virtual Coherency Error",
34  /* 16 */ "FP Exception",
35  /* 17 */ "Reserved 17",
36  /* 18 */ "Reserved 17",
37  /* 19 */ "Reserved 17",
38  /* 20 */ "Reserved 20",
39  /* 21 */ "Reserved 21",
40  /* 22 */ "Reserved 22",
41  /* 23 */ "Watch",
42  /* 24 */ "Reserved 24",
43  /* 25 */ "Reserved 25",
44  /* 26 */ "Reserved 26",
45  /* 27 */ "Reserved 27",
46  /* 28 */ "Reserved 28",
47  /* 29 */ "Reserved 29",
48  /* 30 */ "Reserved 30",
49  /* 31 */ "Data Virtual Coherency Error"
50};
51
52struct regdef
53{
54  int  offset;
55  char *name;
56};
57
58struct regdef dumpregs[]= {
59  { R_RA, "R_RA" }, { R_V0, "R_V0" },     { R_V1, "R_V1" },
60  { R_A0, "R_A0" }, { R_A1, "R_A1" },     { R_A2, "R_A2" },
61  { R_A3, "R_A3" }, { R_T0, "R_T0" },     { R_T1, "R_T1" },
62  { R_T2, "R_T2" }, { R_T3, "R_T3" },     { R_T4, "R_T4" },
63  { R_T5, "R_T5" }, { R_T6, "R_T6" },     { R_T7, "R_T7" },
64  { R_T8, "R_T8" }, { R_MDLO, "R_MDLO" }, { R_MDHI, "R_MDHI" },
65  { R_GP, "R_GP" }, { R_FP, "R_FP" },     { R_AT, "R_AT" },
66  { R_EPC,"R_EPC"}, { -1, NULL }
67};
68
69void mips_dump_exception_frame( CPU_Interrupt_frame *frame )
70{
71  unsigned int *frame_u32;
72  int   i, j;
73
74  frame_u32 = (uint32_t   *)frame;
75  for(i=0; dumpregs[i].offset > -1; i++)
76  {
77     printk("   %s", dumpregs[i].name);
78     for(j=0; j< 7-strlen(dumpregs[i].name); j++) printk(" ");
79     printk("  %08X%c", frame_u32[dumpregs[i].offset], (i%3) ? '\t' : '\n' );
80  }
81  printk( "\n" );
82}
83
84void mips_default_exception_code_handler( int exc, CPU_Interrupt_frame *frame )
85{
86  unsigned int sr;
87  unsigned int cause;
88
89  mips_get_sr( sr );
90  mips_get_cause( cause );
91
92  printk( "Unhandled exception %d\n", exc );
93  printk( "sr: 0x%08x  cause: 0x%08x --> %s\n", sr, cause,
94     cause_strings[(cause >> 2) &0x1f] );
95  mips_dump_exception_frame( frame );
96
97  rtems_fatal_error_occurred(1);
98}
99
100#define CALL_EXC(_vector,_frame) \
101   do { \
102        if ( _ISR_Vector_table[_vector] ) \
103             (_ISR_Vector_table[_vector])(_vector,_frame); \
104          else \
105             mips_default_exception_code_handler( _vector, _frame ); \
106   } while(0)
107
108/*
109 *  There are constants defined for these but they should basically
110 *  all be close to the same set.
111 */
112
113void mips_vector_exceptions( CPU_Interrupt_frame *frame )
114{
115  uint32_t   cause;
116  uint32_t   exc;
117
118  mips_get_cause( cause );
119  exc = (cause >> 2) & 0x1f;
120
121  CALL_EXC( exc, frame );
122}
123
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