source: rtems/c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c @ b4d0d18e

4.104.114.84.95
Last change on this file since b4d0d18e was b4d0d18e, checked in by Joel Sherrill <joel.sherrill@…>, on Dec 13, 2000 at 5:52:53 PM

2000-12-13 Joel Sherrill <joel@…>

  • shared/.cvsignore, shared/Makefile.am, shared/cache/.cvsignore, shared/cache/Makefile.am, shared/cache/cache.c, shared/cache/cache_.h, shared/interrupts/.cvsignore, shared/interrupts/Makefile.am, shared/interrupts/installisrentries.c, shared/interrupts/isr_entries.S, shared/interrupts/maxvectors.c, tx39/.cvsignore, tx39/Makefile.am, tx39/include/.cvsignore, tx39/include/Makefile.am, tx39/include/tx3904.h: New file. Moved some pieces of interrupt processing from score/cpu to libcpu/mips since many interrupt servicing characteristics are CPU model dependent. This patch addresses the number of interrupt sources and where the ISR prologues are located. The only way to currently install the ISR prologues requires that the prologues be installed into RAM.
  • Property mode set to 100644
File size: 767 bytes
Line 
1/*
2 *  This file contains the maximum number of vectors.  This can not
3 *  be determined without knowing the RTEMS CPU model.
4 *
5 *  COPYRIGHT (c) 1989-2000.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.OARcorp.com/rtems/license.html.
11 *
12 *  $Id$
13 */
14
15
16/*
17 *  The tx3904 attaches 4 of the eight interrupt bits to an on-CPU interrupt
18 *  controller so that these four bits map to 16 unique interrupts.
19 *  So you have: 2 software interrupts, an NMI, and 16 others.
20 */
21#if defined(tx3904)
22#define MAX_VECTORS 19
23#endif
24
25#ifndef MAX
26#define MAX_VECTORS 8
27#endif
28
29unsigned int mips_interrupt_number_of_vectors = MAX_VECTORS;
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