| 1 | /* |
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| 2 | * This file contains the raw entry points for the exceptions. |
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| 3 | * |
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| 4 | * COPYRIGHT (c) 1989-2000. |
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| 5 | * On-Line Applications Research Corporation (OAR). |
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| 6 | * |
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| 7 | * The license and distribution terms for this file may be |
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| 8 | * found in the file LICENSE in this distribution or at |
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| 9 | * http://www.rtems.org/license/LICENSE. |
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| 10 | */ |
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| 11 | |
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| 12 | #include <rtems/asm.h> |
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| 13 | #include <rtems/mips/iregdef.h> |
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| 14 | #include <rtems/mips/idtcpu.h> |
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| 15 | |
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| 16 | /* |
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| 17 | * MIPS ISA Level 1 entries |
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| 18 | */ |
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| 19 | |
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| 20 | #if __mips == 1 |
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| 21 | |
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| 22 | FRAME(exc_norm_code,sp,0,ra) |
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| 23 | la k0, _ISR_Handler /* generic external int hndlr */ |
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| 24 | j k0 |
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| 25 | nop |
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| 26 | ENDFRAME(exc_norm_code) |
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| 27 | |
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| 28 | FRAME(exc_dbg_code,sp,0,ra) |
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| 29 | la k0, _DBG_Handler /* debug interrupt */ |
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| 30 | j k0 |
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| 31 | nop |
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| 32 | ENDFRAME(exc_dbg_code) |
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| 33 | |
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| 34 | /* XXX this is dependent on IDT/SIM and needs to be addressed */ |
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| 35 | FRAME(exc_utlb_code,sp,0,ra) |
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| 36 | la k0, (R_VEC+((48)*8)) |
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| 37 | j k0 |
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| 38 | nop |
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| 39 | ENDFRAME(exc_utlb_code) |
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| 40 | |
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| 41 | /* |
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| 42 | * MIPS ISA Level 32 |
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| 43 | * XXX Again, reliance on SIM. Not good.?????????? |
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| 44 | */ |
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| 45 | #elif __mips == 32 |
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| 46 | FRAME(exc_tlb_code,sp,0,ra) |
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| 47 | la k0, _ISR_Handler |
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| 48 | j k0 |
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| 49 | nop |
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| 50 | ENDFRAME(exc_tlb_code) |
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| 51 | |
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| 52 | FRAME(exc_xtlb_code,sp,0,ra) |
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| 53 | la k0, _ISR_Handler |
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| 54 | j k0 |
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| 55 | nop |
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| 56 | |
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| 57 | ENDFRAME(exc_xtlb_code) |
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| 58 | |
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| 59 | FRAME(exc_cache_code,sp,0,ra) |
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| 60 | la k0, _ISR_Handler |
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| 61 | j k0 |
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| 62 | nop |
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| 63 | ENDFRAME(exc_cache_code) |
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| 64 | |
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| 65 | FRAME(exc_norm_code,sp,0,ra) |
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| 66 | la k0, _ISR_Handler /* generic external int hndlr */ |
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| 67 | j k0 |
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| 68 | nop |
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| 69 | ENDFRAME(exc_norm_code) |
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| 70 | |
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| 71 | /* |
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| 72 | * MIPS ISA Level 3 |
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| 73 | * XXX Again, reliance on SIM. Not good. |
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| 74 | */ |
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| 75 | #elif __mips == 3 |
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| 76 | |
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| 77 | FRAME(exc_tlb_code,sp,0,ra) |
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| 78 | la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ |
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| 79 | j k0 |
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| 80 | nop |
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| 81 | ENDFRAME(exc_tlb_code) |
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| 82 | |
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| 83 | FRAME(exc_xtlb_code,sp,0,ra) |
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| 84 | la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ |
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| 85 | j k0 |
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| 86 | nop |
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| 87 | |
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| 88 | ENDFRAME(exc_xtlb_code) |
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| 89 | |
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| 90 | FRAME(exc_cache_code,sp,0,ra) |
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| 91 | la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ |
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| 92 | j k0 |
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| 93 | nop |
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| 94 | ENDFRAME(exc_cache_code) |
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| 95 | |
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| 96 | FRAME(exc_norm_code,sp,0,ra) |
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| 97 | la k0, _ISR_Handler /* generic external int hndlr */ |
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| 98 | j k0 |
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| 99 | nop |
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| 100 | ENDFRAME(exc_norm_code) |
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| 101 | |
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| 102 | #else |
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| 103 | |
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| 104 | #error "isr_entries.S: ISA support problem" |
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| 105 | |
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| 106 | #endif |
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