source: rtems/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S @ 0cd196b7

4.104.114.84.95
Last change on this file since 0cd196b7 was 0cd196b7, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/03/04 at 00:15:56

2004-04-02 Ralf Corsepius <ralf_corsepius@…>

  • clock/clock.S, mongoosev/vectorisrs/vectorisrs.c, shared/interrupts/isr_entries.S, shared/interrupts/vectorexceptions.c, timer/gettime.S: Include <rtems/mips/iregdef.h> instead of <iregdef.h>.
  • clock/clock.S, mongoosev/vectorisrs/vectorisrs.c, shared/interrupts/installisrentries.c, shared/interrupts/isr_entries.S, shared/interrupts/vectorexceptions.c, timer/gettime.S: Include <rtems/mips/idtcpu.h> instead of <idtcpu.h>.
  • Property mode set to 100644
File size: 1.6 KB
Line 
1/*
2 *  This file contains the raw entry points for the exceptions.
3 *
4 *  COPYRIGHT (c) 1989-2000.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13
14#include <rtems/asm.h>
15#include <rtems/mips/iregdef.h>
16#include <rtems/mips/idtcpu.h>
17
18/*
19 *  MIPS ISA Level 1 entries
20 */
21
22#if __mips == 1
23
24FRAME(exc_norm_code,sp,0,ra)
25        la      k0, _ISR_Handler /* generic external int hndlr */
26        j       k0
27        nop
28ENDFRAME(exc_norm_code)
29
30FRAME(exc_dbg_code,sp,0,ra)
31        la      k0, _DBG_Handler /* debug interrupt */
32        j       k0
33        nop
34ENDFRAME(exc_dbg_code)
35       
36/* XXX this is dependent on IDT/SIM and needs to be addressed */
37FRAME(exc_utlb_code,sp,0,ra)
38        la      k0, (R_VEC+((48)*8))
39        j       k0
40        nop
41ENDFRAME(exc_utlb_code)
42
43/*
44 * MIPS ISA Level 3
45 * XXX Again, reliance on SIM. Not good.
46 */
47#elif __mips == 3
48
49FRAME(exc_tlb_code,sp,0,ra)
50        la      k0, (R_VEC+((112)*8)) /* R4000 Sim location */
51        j       k0
52        nop
53ENDFRAME(exc_tlb_code)
54
55FRAME(exc_xtlb_code,sp,0,ra)
56        la      k0, (R_VEC+((112)*8)) /* R4000 Sim location */
57        j       k0
58        nop
59
60ENDFRAME(exc_xtlb_code)
61
62FRAME(exc_cache_code,sp,0,ra)
63        la      k0, (R_VEC+((112)*8)) /* R4000 Sim location */
64        j       k0
65        nop
66ENDFRAME(exc_cache_code)
67
68FRAME(exc_norm_code,sp,0,ra)
69        la      k0, _ISR_Handler /* generic external int hndlr */
70        j       k0
71        nop
72ENDFRAME(exc_norm_code)
73
74#else
75
76#error "isr_entries.S: ISA support problem"
77
78#endif
79
Note: See TracBrowser for help on using the repository browser.